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AS1720

Datasheet - D e t a i l e d D e s c r i p t i o n

8 Detailed Description

Delay

The delay time is generated internally by a digital divider.

LDO and Reference Generator

This block provides the internal supply voltage of typ. 3.3V and all bias currents for the analog cells. Further the external resistor divider for

setting the duty cycle will be supplied.

Thermal shutdown

The temperature is constantly monitored. If the temperature exceeds typ. 160ºC the output is disabled. In order to exit the over temperature

condition, the device has to cool down and the reason of over temperature (e.g. short circuit) must be removed. After exiting the overtemperature

condition the system restarts beginning with the energizing phase followed by the hold phase.

DC Operation (AS1720A only)

After power up, the delay time (see Delay) starts running. After expiration of the delay the hold phase starts automatically. During the hold phase

PWM Operation (AS1720B only)

After power up, the delay time (see Delay) starts running. After expiration of the delay the hold phase starts automatically. The internal RC

oscillator sets the PWM period. The duty cycle is either defined by the external resistor divider (voltage) at pin DUTY or by the fixed internal

divider. When using the external divider the duty cycle can be adjusted between 20% and 90% (e.g. from a DAC). Alternatively the pin can be

and switches to the internal divider, which causes a fixed 50% duty cycle.

Figure 9. Simplified Circuit of Block PWM and Control

(EQ 1)

DUTYCYCLE V

DUTY

(

)

0 381

,

V

DUTY

×

0 014

,

–

=

DUTY

adjustable

Duty cycle

fixed

50% Duty cycle

optional

PWM &

Control

DUTY

30kHz

Oscillator

VDDA

R1

R2

ENN

On

Off

Internal VDDA typ. 3.3V

Delay

VDDA

VDDA