LT3517

19

3517ff

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

C

4/10

Added H-grade to Order Information Section

2

D

7/10

Added conditions to ISP, ISN Idle Input Bias Current parameters

3

7

E

01/11

Updated Electrical Characteristics

3

F

04/12

Added Operating in Note 2

Clarified Application Schematics

Package Diagram Updated

1

2

4

15, 16

18

(Revision history begins at Rev C)