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SP3238EEA 数据表(PDF) 9 Page - Sipex Corporation

部件名 SP3238EEA
功能描述  Intelligent 3.0V to 5.5V RS-232 Transceivers
PDF  20 Pages
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制造商  SIPEX [Sipex Corporation]
网页  http://www.sipex.com
标志 SIPEX - Sipex Corporation

SP3238EEA 数据表(HTML) 9 Page - Sipex Corporation

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SP3238EDS/04
SP3238E +3.0V to +5.5V RS-232 Transceivers
© Copyright 1999 Sipex Corporation
The SP3238E drivers can maintain high data
rates up to 250kbps fully loaded. Figure 7 shows
a loopback test circuit used to test the RS-232
Drivers. Figure 8 shows the test results of the
loopback circuit with all three drivers active at
120kbps with typical RS-232 loadsinparallelwith
1000pF capacitors. Figure 9 shows the test results
where one driver was active at 250kbps and all
three drivers loaded with an RS-232 receiver in
parallel with a 1000pF capacitor. A solid RS-232
data transmission rate of 120kbps provides
compatibility with many designs in personal
computer peripherals and LAN applications.
Receivers
The receivers convert
±5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. All
receivers have an inverting output that can be
disabled by using the EN pin.
Receivers are active when the Auto-Online
circuitry is enabled or when in shutdown.
During the shutdown, the receivers will continue
to be active. If there is no activity present at the
receivers for a period longer than 100
µs or when
SHUTDOWN is enabled, the device goes into a
standby mode where the circuit draws 1
µA.
The truth table logic of the driver and receiver
outputs can be found in Table 2.
Figure 7. Loopback Test Circuit for RS-232 Driver Data
Transmission Rates
The SP3238E includes an additional non-
inverting receiver with an output R
1OUT. R1OUT
is an extra output that remains active and monitors
activity while the other receiver outputs are
forced into high impedance. This allows Ring
Indicator (RI) from a peripheral to be monitored
without forward biasing the TTL/CMOS inputs
of the other devices connected to the receiver
outputs.
Figure 8. Loopback Test Circuit Result at 120kbps
(All Drivers Fully Loaded)
Figure 9. Loopback Test Circuit result at 235kbps
(All Drivers Fully Loaded)
TBD
TBD
SP3238E
TxIN
TxOUT
C1+
C1-
C2+
C2-
V+
V-
VCC
0.1
µF
0.1
µF
0.1
µF
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
µF
0.1
µF
LOGIC
INPUTS
VCC
5k
Ω
RxIN
RxOUT
LOGIC
OUTPUTS
SHUTDOWN
GND
VCC
ONLINE
1000pF



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