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SP3486CT 数据表(PDF) 3 Page - Sipex Corporation

部件名 SP3486CT
功能描述  3.3V Low Power Quad RS-485/RS-422 Line Drivers
PDF  9 Pages
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制造商  SIPEX [Sipex Corporation]
网页  http://www.sipex.com
标志 SIPEX - Sipex Corporation

SP3486CT 数据表(HTML) 3 Page - Sipex Corporation

  SP3486CT Datasheet HTML 1Page - Sipex Corporation SP3486CT Datasheet HTML 2Page - Sipex Corporation SP3486CT Datasheet HTML 3Page - Sipex Corporation SP3486CT Datasheet HTML 4Page - Sipex Corporation SP3486CT Datasheet HTML 5Page - Sipex Corporation SP3486CT Datasheet HTML 6Page - Sipex Corporation SP3486CT Datasheet HTML 7Page - Sipex Corporation SP3486CT Datasheet HTML 8Page - Sipex Corporation SP3486CT Datasheet HTML 9Page - Sipex Corporation  
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10/15/02
SP3486/3487 Low Power Quad RS485/422 Line Drivers
© Copyright 2002 Sipex Corporation
3
PINOUT — SP3486
1
2
3
4
SP3486
DI1
DO1A
DO1B
EN
DO2B
DO2A
DI2
GND
VCC
DI4
DO4A
DO4B
EN
DO3B
DO3A
DI3
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Figure 2. Driver Propagation Delay Test Circuit
Figure 1. Driver DC Test Load Circuit
Figure 3. Driver Enable and Disable Timing Circuit,
Output HIGH
SP3486 PINOUT
Pin 1 — DI
1 — Driver 1 Input — If Driver 1 output
is enabled, logic 0 on DI
1 forces driver output
DO
1A low and DO1B high. A logic 1 on DI1 with
Driver 1 output enabled forces driver DO
1A high
and DO
1B low.
Pin 2 — DO
1A — Driver 1 output A.
Pin 3 — DO
1B — Driver 1 output B.
Pin 4 — EN — Driver Output Enable. Please refer
to SP3486 Truth Table (1).
Pin 5 — DO
2B — Driver 2 output B.
Pin 6 — DO
2A — Driver 2 output A.
Pin 7 — DI
2 — Driver 2 Input — If Driver 2 output
is enabled, logic 0 on DI
2 forces driver output
DO
2A low and DO2B high. A logic 1 on DI2 with
Driver 2 output enabled forces driver DO
2A high
and DO
2B low.
Pin 8 — GND — Digital Ground.
Pin 9 — DI
3 — Driver 3 Input — If Driver 3 output
is enabled, logic 0 on DI
3 forces driver output
DO
3A low and DO3B high. A logic 1 on DI3 with
Driver 3 output enabled forces driver DO
3A high
and DO
3B low.
Pin 10 — DO
3A — Driver 3 output A.
Pin 11 — DO
3B — Driver 3 output B.
Pin 12 — EN — Driver Output Disable. Please
refer to SP486 Truth Table (1).
Figure 4. Driver Enable and Disable Timing Circuit,
Output LOW
R
R
VOC
D
VCC
VOD
GENERATOR
(NOTE 1)
50Ω
VCC
S1
VDM
RL = 27Ω
OUT
CL = 15PF
(NOTE 2)
VOM =
1.5V
VOH + VOL
2
D
GENERATOR
(NOTE 1)
50Ω
S1
RL = 110Ω
OUT
CL = 50pF
(NOTE 2)
VOM =
1.5V
VOH + VOL
2
D
GENERATOR
(NOTE 1)
50Ω
S1
RL = 110Ω
OUT
CL = 50pF
(NOTE 2)
D
0V OR 3V
VCC



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