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SP3490CP 数据表(PDF) 4 Page - Sipex Corporation |
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SP3490CP 数据表(HTML) 4 Page - Sipex Corporation |
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4 / 11 page ![]() Rev. 10/11/02 SP3490/3491 Low Power Full-Duplex RS485 Transceivers © Copyright 2002 Sipex Corporation 4 Figure 7. Receiver Enable and Disable Timing Circuit Figure 8. Driver Propagation Delay Waveforms Figure 9. Driver Differential Output Delay and Transition Time Waveforms Figure 10. Driver Enable and Disable Timing Waveforms Figure 11. Receiver Propagation Delay Waveforms 1.5V -1.5V S3 VID GENERATOR (NOTE 1) 50Ω CL = 15pF (NOTE 2) R 1k S1 S2 VCC 0V VOH tPLH tPHL VOM tPHL tPLH 3V VOL VOH 1.5V 1.5V INPUT Y OUTPUT VOM Z OUTPUT VOL VOM VOM VOM = V OH + VOL 2 ≈ 1.5V 3V 0V VCC tRPLH 1.5V tRPHL VOM VOM 0V 1.5V INPUT OUTPUT VOM = V CC 2 IN 1.5V tDPLH 1.5V tDPHL 3V 0V OUT 50% 50% 10% 10% 90% 90% tR tF 2.0V -2.0V 0V VOH tPZH 0.25V tPHZ VOM tPZL tPLZ 3V VOL VCC 1.5V 1.5V DE OUTPUT HIGH VOM 0.25V 0V OUTPUT LOW VOM = V OH + VOL 2 ≈ 1.5V |
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