SP574B/674B/1674B/774B

12–Bit Sampling A/D Converters

© Copyright 2000 Sipex Corporation

8

+9.9927V for the

±10V range. Adjust the gain

potentiometer R

1110 and 1111 1111 1111.

Alternative

The 100

Ω potentiometer R

for 10V and 20V ranges. In some applications, a

full scale of 10.24V (for and LSB of 2.5mV) or

20.48 (for an LSB of 5.0mV) is more convenient.

For these, replace R

resistor. Then to provide gain adjust for the 10.24

range, add a 200

Ωpotentiometer in series with pin

13. For the 20.48V range, add a 1000

Ωpotentiom-

eter in series with pin 14.

The gain adjustment should be done at positive full

scale. The ideal input corresponding to the last

nominal full scale which is +9.9963V for the 10V

range and +19.9927V for the 20V range. Adjust

the gain potentiometer R

codes 1111 1111 1110 and 1111 1111 1111. If

calibration is not necessary for the intended appli-

cation, replace R

resistor and remove the network analog input to

pin 13 for the 0V to 10V range or to pin 14 for the

0V to 20V range.

Bipolar

The gain and offset errors listed in the specifica-

tions may be adjusted to zero using the potentiom-

eters R

needed, either or both pots may be replaced by a

50

Ω, 1% metal film resistor.

To calibrate, connect the analog input signal to pin

13 for a

±5V range or to pin 14 for a ±10V range.

negative full scale which is –4.9988V for the

±5V

range or –9.9976V for the

±10V range. Adjust the

offset potentiometer R

codes 0000 0000 0000 and 0000 0000 0001. Next,

full scale which is +4.9963V for the

±5 range or

CONTROLLING THE SPx74B

The SPx74B can be operated by most micropro-

cessor systems due to the control input pins and

on–chip logic. It may also be operated in the

“stand–alone” mode and enabled by the R/C

input pin. Full microprocessor control consists

of selecting an 8– or 12–bit conversion cycle,

initiating the conversion, and reading the output

data when ready. The output read has the options

of choosing either 12–bits at once or 8–bits fol-

lowed by 4–bits in a left–justified format. All five

control inputs are TTL/CMOS compatible and

include 12/8, CS, A

inputs in controlling the converter’s operation is

Figure 3. Bipolar Input Connections

2

28

STS

12/8

CS

A0

R/C

CE

THREE–STATE BUFFERS AND CONTROL

NIBBLE A

NIBBLE B

NIBBLE C

27

26

25

24

23

22

21 20

19 18

17 16

OUTPUT BITS

MSB

LSB

3

4

5

6

CONTROL

LOGIC

OSCILLATOR

12–BITS

12–BITS

SAMPLE/HOLD

CDAC

LSB

MSB

OFFSET/GAIN

TRIM NETWORK

REF

REF

AMP

8

10

VREF

OUT

VREF

IN

100

Ω

R1

10V

IN

20V

IN

BIP

OFF

13

14

12

ANALOG

INPUTS

12–BIT SAR

COMP

STROBE

100

Ω

R2

±5V

±10V

DGND

1

15

VLOGIC

+5V

711

VCC

VEE

9

AGND

+15V

N.C.

10µF

0.1µF

10µF

0.1µF

+

+