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CY2DP818ZXC 数据表(PDF) 6 Page - Cypress Semiconductor

部件名 CY2DP818ZXC
功能描述  1:8 Clock Fanout Buffer
PDF  13 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

CY2DP818ZXC 数据表(HTML) 6 Page - Cypress Semiconductor

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CY2DP818
Document Number: 38-07061 Rev. *D
Page 6 of 13
DC Electrical Specifications
Table 4. LVDS Input, VDD = 3.3 V ± 5%, TA = 0C to 70 C or –40 C to 85 C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VID
Magnitude of Differential Input
Voltage
100
–
600
mV
VIC
Common-mode of Differential
Input VoltageIVIDI (min and max)
IVIDI/2
2.4–(IVIDI/2)
V
VIH
Input High Voltage
Guaranteed Logic High Level
2
–
–
V
VIL
Input Low Voltage
Guaranteed Logic Low Level
–
–
0.8
V
IIH
Input High Current
VDD = Max, VIN = VDD
–±10
±20
A
IIL
Input Low Current
VDD = Max, VIN = VSS
–±10
±20
A
Table 5. LVPECL Input, VDD = 3.3 V ± 5%, TA = 0 C to 70 C or –40 C to 85 C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VID
Differential Input Voltage p-p
Guaranteed Logic High Level
400
–
2600
mV
VIH
Input High Voltage
Guaranteed Logic High Level
2.15
–
2.4
V
VIL
Input Low Voltage
Guaranteed Logic Low Level
1.5
–
1.8
V
IIH
Input High Current
VDD = Max, VIN = VDD
–±10
±20
A
IIL
Input Low Current
VDD = Max, VIN = VSS
–±10
±20
A
VCM
Common-mode Voltage
–
–
225
mV
Table 6. LVTTL/LVCMOS Input, VDD = 3.3 V ± 5%, TA = 0 C to 70 C or –40 C to 85 C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VIH
Input High Voltage
2
–
–
V
VIL
Input Low Voltage
–
–
0.8
V
IIH
Input High Current
VDD = Max, VIN = 2.7 V
––1
A
IIL
Input Low Current
VDD = Max, VIN = 0.5 V
–
–
–1
A
II
Input High Current
VDD = Max, VIN = VDD(Max)
––
20
A
VIK
Clamp Diode Voltage
VDD = Min, IIN = –18 mA
–
–0.7
–1.2
V
VH
Input Hysteresis
–
80
–
mV



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