数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

SL4034B 数据表(PDF) 4 Page - System Logic Semiconductor

部件名 SL4034B
功能描述  8-Stage Static Bidirectional Parallel/ Serial Input/Output Bus Register
PDF  9 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  SLS [System Logic Semiconductor]
网页  http://www.slsemicon.co.kr/e_index.htm
标志 SLS - System Logic Semiconductor

SL4034B 数据表(HTML) 4 Page - System Logic Semiconductor

  SL4034B Datasheet HTML 1Page - System Logic Semiconductor SL4034B Datasheet HTML 2Page - System Logic Semiconductor SL4034B Datasheet HTML 3Page - System Logic Semiconductor SL4034B Datasheet HTML 4Page - System Logic Semiconductor SL4034B Datasheet HTML 5Page - System Logic Semiconductor SL4034B Datasheet HTML 6Page - System Logic Semiconductor SL4034B Datasheet HTML 7Page - System Logic Semiconductor SL4034B Datasheet HTML 8Page - System Logic Semiconductor SL4034B Datasheet HTML 9Page - System Logic Semiconductor  
Zoom Inzoom in Zoom Outzoom out
 4 / 9 page
background image
SL4034B
System Logic
Semiconductor
SLS
AC ELECTRICAL CHARACTERISTICS(C
L=50pF, RL=200k
Ω, Input t
r=tf=20 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
≥-55°C
25
°C
≤125°C
Unit
fmax
Maximum Clock Frequency (Figure 2)
5.0
10
15
2
5
7
2
5
7
1
2.5
3.5
MHz
tPHL, tPLH
Maximum Propagation Delay, A(B) Parallel Data
In to B(A) Parallel Data Out; Serial to Parallel
Data Out (Figures 1,2)
5.0
10
15
700
240
170
700
240
170
1400
480
340
ns
tPLZ, tPHZ,
tPZL, tPZH
Maximum Propagation Delay, A/B or AE to “A”
Output (Figure 3)
5.0
10
15
400
160
120
400
160
120
800
320
240
ns
tTHL, tTLH
Maximum Output Transition Time, Any Output
(Figures 1,2)
5.0
10
15
200
100
80
200
100
80
400
200
160
ns
CIN
Maximum Input Capacitance
-
7.5
pF
TIMING REQUIREMENTS(C
L=50pF, RL=200 k
Ω, Input t
r=tf=20 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
≥-55°C
25
°C
≤125°C
Unit
tsu
Minimum Setup Time, Serial Data to Clock
(Figure 4)
5.0
10
15
160
60
40
160
60
40
320
120
80
ns
tsu
Minimum Setup Time, Parallel Data to Clock
(Figure 4)
5.0
10
15
50
30
20
50
30
20
100
60
40
ns
th
Minimum Hold Time, Clock to Data (Figure 4)
5.0
10
15
50
15
10
50
15
10
100
30
20
ns
tw
Minimum Pulse Width, AE, P/S, A/S
(Figure 5)
5.0
10
15
350
140
80
350
140
80
700
280
160
ns
tw
Minimum Pulse Width, Clock (Figure 2)
5.0
10
15
250
100
70
250
100
70
500
200
140
ns
tr ,tf
Minimum Input Rise or Fall Time, Clock (Figure
2)
5.0
10
15
15
15
15
15
15
15
30
30
30
ns



Html Pages

1 2 3 4 5 6 7 8 9


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com