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SL4052B 数据表(PDF) 4 Page - System Logic Semiconductor |
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SL4052B 数据表(HTML) 4 Page - System Logic Semiconductor |
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4 / 6 page ![]() SL4052B System Logic Semiconductor SLS AC ELECTRICAL CHARACTERISTICS(C L=50pF,Input t r=tf=20.0 ns) VCC Guaranteed Limit Symbol Parameter V ≥ -55 °C ≤ 25 °C ≤ 125 °C Unit tPLH, tPHL Maximum Propagation Delay , Analog Input to Analog Output (Figure 1) RL=200k Ω 5 10 15 60 30 20 60 30 20 120 60 40 ns tPLZ, tPHZ Maximum Propagation Delay , Address to Analog Output (Figure 2) RL=10k Ω VEE=GND=0 5 10 15 720 320 240 720 320 240 1440 640 480 ns VEE=-5V 5 450 450 900 tPLZ, tPZL Maximum Propagation Delay, Enable to Analog Output (Figure 2) RL=10k Ω VEE=GND=0 5 10 15 720 320 240 720 320 240 1440 640 480 ns VEE=-10V 5 400 400 800 tPHZ, tPZH Maximum Propagation Delay, Enable to Analog Output (Figure 2) RL=10k Ω VEE=GND=0 5 10 15 450 210 160 450 210 160 900 420 320 ns VEE=-10V 5 300 300 600 CIN Maximum Input Capacitance, Channel-Select or Enable Inputs - 7.5 7.5 7.5 pF CI/O Maximum Capacitance VEE=GND=-5V CIS 5 - 5 - pF COS 5 - 18 - Feedthrough CIOS 5 - 0.2 - |
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