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HC123 数据表(PDF) 4 Page - System Logic Semiconductor

部件名 HC123
功能描述  Dual Retriggerable Monostable Multivibrator
PDF  6 Pages
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制造商  SLS [System Logic Semiconductor]
网页  http://www.slsemicon.co.kr/e_index.htm
标志 SLS - System Logic Semiconductor

HC123 数据表(HTML) 4 Page - System Logic Semiconductor

  HC123 Datasheet HTML 1Page - System Logic Semiconductor HC123 Datasheet HTML 2Page - System Logic Semiconductor HC123 Datasheet HTML 3Page - System Logic Semiconductor HC123 Datasheet HTML 4Page - System Logic Semiconductor HC123 Datasheet HTML 5Page - System Logic Semiconductor HC123 Datasheet HTML 6Page - System Logic Semiconductor  
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SL74HC123
System Logic
Semiconductor
SLS
AC ELECTRICAL CHARACTERISTICS(C
L=50pF,Input t r=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25
°C to
-55
°C
≤85
°C
≤125
°C
Unit
tPLH, tPHL
Maximum Propagation Delay, Input A or B to Q or
Q (Figures 1 and 3)
2.0
4.5
6.0
255
50
45
320
65
55
385
75
65
ns
tPLH, tPHL
Maximum Propagation Delay , CLR to Q or Q
(Figures 2 and 3)
2.0
4.5
6.0
215
45
35
270
55
45
325
65
55
ns
tTLH, tTHL
Maximum Output Transition Time, Any
Output(Figures 2 and 3)
2.0
4.5
6.0
75
16
14
95
20
17
110
22
20
ns
CIN
Maximum Input Capacitance
A, B, CLR
CX, RX
-
10
25
10
25
10
25
pF
Power Dissipation Capacitance
(Per Multivibrator)
Typical @25
°C,V
CC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
PD=CPDVCC
2f+I
CCVCC
150
pF
TIMING REQUIREMENTS(C
L=50pF,Input t r=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25
°C to
-55
°C
≤85°C
≤125°C
Unit
trec
Minimum Recovery Time,
Inactive to A or B
(Figure 2)
2.0
4.5
6.0
0
0
0
0
0
0
0
0
0
ns
tw
Minimum Pulse Width,
Input A or B (Figure 1)
2.0
4.5
6.0
100
20
17
125
25
20
150
30
25
ns
tw
Minimum Pulse Width,
CLR (Figure 2)
2.0
4.5
6.0
100
20
17
125
25
20
150
30
25
ns
tr, tr
Maximum Input Rise and
Fall Times, CLR
(Figure 2)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
ns
A or B (Figure 2)
2.0
4.5
6.0
No Limit



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