SL74HC166 datasheet(4/6 Pages) SLS

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SL74HC166

System Logic

Semiconductor

SLS

AC ELECTRICAL CHARACTERISTICS(C

L=50pF,Input t r=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

°C to

-55

°C

≤85°C

≤125°C

Unit

fmax

Minimum Clock Frequency (50% Duty Cycle)

(Figures 2 and 4)

2.0

4.5

6.0

5.0

4.2

MHz

tPLH, tPHL

Maximum Propagation Delay, Clock (or Clock

Inhibit) to QH (Figures 2,3 and 4)

2.0

4.5

6.0

140

175

210

tPHL

Maximum Propagation Delay , Clear to QH (Figures

1 and 4)

2.0

4.5

6.0

150

200

230

tTLH, tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 4)

2.0

4.5

6.0

110

CIN

Maximum Input Capacitance

Power Dissipation Capacitance (Per Package)

Typical @25

°C,V

CC=5.0 V

CPD

Used to determine the no-load dynamic power

consumption:

PD=CPDVCC

2f+I

CCVCC

140

TIMING REQUIREMENTS(C

L=50pF,Input t r=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

°C to

-55

°C

≤85°C

≤125°C

Unit

tsu

Minimum Setup Time, Shift/Load to

Clock (Figure 3)

2.0

4.5

6.0

100

120

tsu

Minimum Setup Time, Data before

Clock (or Clock Inhibit) (Figure 3)

2.0

4.5

6.0

100

120

Minimum Pulse Width, Clock (or

Clock Inhibit) (Figure 2)

2.0

4.5

6.0

100

120

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