ADCMP600/ADCMP601/ADCMP602

Rev. A | Page 15 of 16

1.30 BSC

COMPLIANT TO JEDEC STANDARDS MO-203-AB

1.00

0.90

0.70

0.46

0.36

0.26

2.20

2.00

1.80

2.40

2.10

1.80

1.35

1.25

1.15

0.10 MAX

1.10

0.80

0.40

0.10

0.22

0.08

3

1

2

4

6

5

0.65 BSC

COPLANARITY

0.10

SEATING

PLANE

0.30

0.15

Figure 29. 6-Lead Thin Shrink Small Outline Transistor Package (SC70)

(KS-6)

Dimensions shown in millimeters

COMPLIANT TO JEDEC STANDARDS MO-187-AA

6°

0°

0.80

0.55

0.40

4

8

1

5

0.65 BSC

0.40

0.25

1.10 MAX

3.20

3.00

2.80

COPLANARITY

0.10

0.23

0.09

3.20

3.00

2.80

5.15

4.90

4.65

PIN 1

IDENTIFIER

15° MAX

0.95

0.85

0.75

0.15

0.05

Figure 30. 8-Lead Mini Small Outline Package (MSOP)

(RM-8)

Dimensions shown in millimeters