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ADCMP601BKSZ-R2 数据表(PDF) 2 Page - Analog Devices |
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ADCMP601BKSZ-R2 数据表(HTML) 2 Page - Analog Devices |
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2 / 16 page ![]() ADCMP600/ADCMP601/ADCMP602 Rev. A | Page 2 of 16 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Timing Information ......................................................................... 5 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Application Information................................................................ 10 Power/Ground Layout and Bypassing..................................... 10 TTL-/CMOS-Compatible Output Stage ................................. 10 Using/Disabling the Latch Feature........................................... 10 Optimizing Performance........................................................... 11 Comparator Propagation Delay Dispersion ........................... 11 Comparator Hysteresis .............................................................. 11 Crossover Bias Point .................................................................. 12 Minimum Input Slew Rate Requirement................................ 12 Typical Application Circuits ......................................................... 13 Outline Dimensions....................................................................... 14 Ordering Guide .......................................................................... 16 REVISION HISTORY 1/11—Rev. 0 to Rev. A Changed VEE Pin to GND.............................................Throughout Changes to Common-Mode Dispersion Conditions................... 4 Changes to Figure 15 and Figure 16............................................... 9 Changes to Comparator Hysteresis Section................................ 12 Updated Outline Dimensions....................................................... 14 Changes to Ordering Guide .......................................................... 15 10/06—Revision 0: Initial Version |
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