SL74HC299D datasheet(5/8 Pages) SLS

部件名	SL74HC299D

功能描述	8-Bit Bidirectional Universal Shift Register with Parallel I/O

PDF	8 Pages

Scroll/Zoom	100%

制造商	SLS [System Logic Semiconductor]

网页	http://www.slsemicon.co.kr/e_index.htm

标志

5 / 8 page

SL74HC299

System Logic

Semiconductor

SLS

TIMING REQUIREMENTS(C

L=50pF,Input t r=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

°C to-55°C

≤85°C

≤125°C

Unit

tsu

Minimum Setup Time, Mode Select S1

or S2 to Clock (Figure 4)

2.0

4.5

6.0

100

125

150

tsu

Minimum Setup Time, Data Inputs SA,

SH, PA thru PH to Clock

(Figure 4)

2.0

4.5

6.0

100

125

150

Minimum Hold Time, Clock to Mode

Select S1 or S2 (Figure 4)

2.0

4.5

6.0

120

150

180

Minimum Hold Time, Clock to Data

Inputs, SA, SH, PA thru PH (Figure 4)

2.0

4.5

6.0

trec

Minimum Recovery Time, Reset

Inactive to Clock (Figure 2)

2.0

4.5

6.0

Minimum Pulse Width, Clock (Figure

2.0

4.5

6.0

100

120

Minimum Pulse Width, Reset (Figure

2.0

4.5

6.0

100

120

tr, tf

Maximum Input Rise and Fall Times

(Figure 1)

2.0

4.5

6.0

1000

500

400

1000

500

400

1000

500

400

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