HC4053 datasheet(2/8 Pages) SLS

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SL74HC4053

System Logic

Semiconductor

SLS

MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

VCC

Positive DC Supply Voltage (Referenced to GND)

(Referenced to VEE)

-0.5 to +7.0

-0.5 to +14.0

VEE

Negative DC Supply Voltage (Referenced to GND)

-7.0 to +0.5

VIS

Analog Input Voltage

VEE - 0.5 to VCC+0.5

VIN

Digital Input Voltage (Referenced to GND)

-1.5 to VCC +1.5

DC Input Current Into or Out of Any Pin

±25

Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

750

500

Tstg

Storage Temperature

-65 to +150

°C

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

260

°C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

+Derating - Plastic DIP: - 10 mW/

°C from 65° to 125°C

SOIC Package: : - 7 mW/

°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

VCC

Positive Supply Voltage (Referenced to GND)

(Referenced to VEE)

2.0

6.0

12.0

VEE

Negative DC Supply Voltage (Referenced to GND)

- 6.0

GND

VIS

Analog Input Voltage

VEE

VCC

VIN

Digital Input Voltage (Referenced to GND)

GND

VCC

VIO

Static or Dynamic Voltage Across Switch

1.2

Operating Temperature, All Package Types

-55

+125

°C

tr, tf

Input Rise and Fall Time (Channel Select

or Enable Inputs)

VCC =2.0 V

VCC =4.5 V

VCC =6.0 V

1000

500

400

* For voltage drops across the switch greater than 1.2 V (switch on), excessive V

CC current may be drawn;

i. e., the current out of the switch may contain both VCC and switch input components. The reliability of the

device will be unaffected unless the Maximum Ratings are exceeded.

This device contains protection circuitry to guard against damage due to high static voltages or electric

fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated

voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range

indicated in the Recommended Operating Conditions..

Unused digital input pins must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).

Unused Analog I/O pins may be left open or terminated.

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