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SL74HC620D 数据表(PDF) 4 Page - System Logic Semiconductor |
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SL74HC620D 数据表(HTML) 4 Page - System Logic Semiconductor |
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4 / 5 page ![]() SL74HC620 System Logic Semiconductor SLS AC ELECTRICAL CHARACTERISTICS(C L=50pF,Input t r=tf=6.0 ns) VCC Guaranteed Limit Symbol Parameter V 25 °C to -55 °C ≤85°C ≤125°C Unit tPLH, tPHL Maximum Propagation Delay, A to B , B to A (Figures 1 and 3) 2.0 4.5 6.0 100 20 17 125 35 21 150 30 26 ns tPLZ, tPHZ Maximum Propagation Delay , Direction or Output Enable to A or B (Figures 2 and 4) 2.0 4.5 6.0 150 30 26 190 38 33 225 45 38 ns tPZL, tPZH Maximum Propagation Delay , Direction or Output Enable to A or B (Figures 2 and 4) 2.0 4.5 6.0 150 30 26 190 38 33 225 45 38 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 3) 2.0 4.5 6.0 60 12 10 75 15 13 90 18 15 ns CIN Maximum Input Capacitance (Pin 1 or Pin 19) - 10 10 10 pF COUT Maximum Three-State I/O Capacitance (I/O in High-Impedance State) - 15 15 15 pF Power Dissipation Capacitance (Per Transceiver Channel) Typical @25 °C,V CC=5.0 V CPD Used to determine the no-load dynamic power consumption: PD=CPDVCC 2f+I CCVCC 40 pF Figure 1. Switching Waveforms Figure 2. Switching Waveforms |
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