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AFE5808ZCF 数据表(PDF) 56 Page - Texas Instruments |
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AFE5808ZCF 数据表(HTML) 56 Page - Texas Instruments |
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56 / 68 page  S0503-01 (a) LVPECL Configuration (c) TransformerBasedConfiguration (d)CMOS Configuration (b) LVDSConfiguration CMOSCLK Driver AFE CMOSCLK CMOS AFE CLOCKs CLOCK SOURCE 50 Ω 0.1 F μ 0.1 F μ 0.1 F μ 0.1 F μ CDCE72010 AFE CLOCKs 100 Ω LVDS 0.1 F μ 0.1 F μ CDCM7005 CDCE7010 AFE CLOCKs 130 Ω LVPECL 0.1 F μ 0.1 F μ 83 Ω 3.3V 3.3V 130 Ω AFE5808 SLOS688C – SEPTEMBER 2010 – REVISED APRIL 2012 www.ti.com Figure 88. Clock Configurations The combination of the clock noise and the CW path noise can degrade the CW performance. The internal clocking circuit is designed for achieving excellent phase noise required by CW operation. The phase noise of the AFE5808 CW path is better than 155dBc/Hz at 1KHz offset. Consequently the phase noise of the mixer clock inputs needs to be better than 155dBc/Hz. 56 Submit Documentation Feedback Copyright © 2010–2012, Texas Instruments Incorporated Product Folder Link(s): AFE5808 |
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