SL74HC75

System Logic

Semiconductor

SLS

Dual 2-Bit Transparent Latch

High-Performance Silicon-Gate CMOS

The SL74HC75 is identical in pinout to the LS/ALS75. The device

inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LS/ALSTTL outputs.

This device consists of two independent 2-bit transparent latches

and can be used as temporary storage for binary information between

processing units and input/output or indicator units. Each latch stores

the input data while Latch Enable is at a logic low. The outputs follow

the data inputs when Latch Enable is at a logic high.

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

ORDERING INFORMATION

SL74HC75N Plastic

SL74HC75D SOIC

° to 125° C for all packages

FUNCTION TABLE

Inputs

Outputs

D

Latch

Enable

Q

Q

L

H

L

H

H

H

H

L

X

L

Q0

Q0

X = Don’t Care

Q0 = latched data

LOGIC DIAGRAM

PIN 12 = GND

PIN ASSIGNMENT