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Exclusive-OR Logic

= 1

EXCLUSIVE OR

These are five equivalent exclusive-OR symbols valid for an CD74ACT86-EP gate in positive logic; negation may be shown at any two ports.

=

2k

2k + 1

LOGIC-IDENTITY ELEMENT

EVEN-PARITY ELEMENT

ODD-PARITY ELEMENT

The output is active (low) if

all inputs stand at the same

logic level (i.e., A = B).

The output is active (low) if

an even number of inputs

(i.e., 0 or 2) are active.

The output is active (high) if

an odd number of inputs

(i.e., only 1 of the 2) are

active.

Absolute Maximum Ratings

(1)

Recommended Operating Conditions

(1)

CD74ACT86-EP

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE

SCHS357 – MARCH 2006

An exclusive-OR gate has many applications, some of which can be represented better by alternative logic

symbols.

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Supply voltage range

–0.5

6

V

±20

mA

±50

mA

Continuous output current

±50

mA

±100

mA

θ

JA

86

°C/W

Storage temperature range

–65

150

°C

(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

(3)

The package thermal impedance is calculated in accordance with JESD 51-7.

–55

°C to

125

°C

UNIT

MIN

MAX

MIN

MAX

Supply voltage

4.5

5.5

4.5

5.5

V

High-level input voltage

2

2

V

Low-level input voltage

0.8

0.8

V

Input voltage

0

0

V

Output voltage

0

0

V

High-level output current

–24

–24

mA

Low-level output current

24

24

mA

∆t/∆v

Input transition rise or fall rate

10

10

ns/V

(1)

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

2

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