LTC6945 datasheet(13/36 Pages) LINER

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2270f

LTC2270

DOUBLE DATA RATE LVDS OUTPUT MODE

All Pins Below Have LVDS Output Levels. The Output

Current Level Is Programmable. There Is an Optional

Internal 100Ω Termination Resistor Between the Pins

of Each LVDS Output Pair.

D2_0_1–/D2_0_1+ to D2_14_15–/D2_14_15+ (Pins 23/24,

25/26, 27/28, 29/30, 31/32, 33/34, 35/36, 37/38): Chan-

nel 2 Double Data Rate Digital Outputs. Two data bits are

multiplexed onto each differential output pair. The even data

bits (D0, D2, D4, D6, D8, D10, D12, D14) appear when

CLKOUT+ is low. The odd data bits (D1, D3, D5, D7, D9,

D11, D13, D15) appear when CLKOUT+ is high.

CLKOUT–/CLKOUT+ (Pins 39/40): Data Output Clock.

The digital outputs normally transition at the same time

as the falling and rising edges of CLKOUT+. The phase of

CLKOUT+ can also be delayed relative to the digital outputs

by programming the mode control registers.

D1_0_1–/D1_0_1+ to D1_14_15–/D1_14_15+ (Pins 43/44,

45/46, 47/48, 49/50, 51/52, 53/54, 55/56, 57/58): Chan-

nel 1 Double Data Rate Digital Outputs. Two data bits are

multiplexed onto each differential output pair. The even data

bits (D0, D2, D4, D6, D8, D10, D12, D14) appear when

CLKOUT+ is low. The odd data bits (D1, D3, D5, D7, D9,

D11, D13, D15) appear when CLKOUT+ is high.

OF2_1–/OF2_1+ (Pins 59/60): Over/Under Flow Digital

Output. OF2_1+ is high when an overflow or underflow

has occurred. The over/under flow for both channels

are multiplexed onto this pin. Channel 2 appears when

CLKOUT+ is low, and Channel 1 appears when CLKOUT+

is high.

PIN FUNCTIONS

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