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SL74LS161 数据表(PDF) 3 Page - System Logic Semiconductor

部件名 SL74LS161
功能描述  Synchronous 4 Bit Counters; Binary, Direct Reset
PDF  5 Pages
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制造商  SLS [System Logic Semiconductor]
网页  http://www.slsemicon.co.kr/e_index.htm
标志 SLS - System Logic Semiconductor

SL74LS161 数据表(HTML) 3 Page - System Logic Semiconductor

  SL74LS161 Datasheet HTML 1Page - System Logic Semiconductor SL74LS161 Datasheet HTML 2Page - System Logic Semiconductor SL74LS161 Datasheet HTML 3Page - System Logic Semiconductor SL74LS161 Datasheet HTML 4Page - System Logic Semiconductor SL74LS161 Datasheet HTML 5Page - System Logic Semiconductor  
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SL74LS161
System Logic
Semiconductor
SLS
DC ELECTRICAL CHARACTERISTICS over full operating conditions
Guaranteed Limit
Symbol
Parameter
Test Conditions
Min
Max
Unit
VIK
Input Clamp Voltage
VCC = min, IIN = -18 mA
-1.5
V
VOH
High Level Output Voltage
VCC = min, IOH = -0.4 mA
2.7
V
VOL
Low Level Output Voltage
VCC = min, IOL = 4 mA
0.4
V
VCC = min, IOL = 8 mA
0.5
IIH
High Level Input Current
VCC = max
Data or enable P
20
µA
VIN =2.7 V
Load, clock or
enable T
40
Reset
20
VCC = max
Data or enable P
0.1
mA
VIN =7.0 V
Load, clock or
enable T
0.2
Reset
0.1
IIL
Low Level Input Current
VCC = max
Data or enable P
-0.4
mA
VIN =0.4 V
Load, clock or
enable T
Reset
-0.8
IO
Output Short Circuit Current
VCC = max, VO = 0 V
(Note 1)
-20
-100
mA
ICC
Supply
Current
All outputs high
VCC = max (Note 2)
31
mA
All outputs low
VCC = max (Note 3)
32
Note 1: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 2: ICCH is measured with the load high, then again with the load low, with all other inputs high and all outputs
open.
Note 3: ICCL is measured with the clock input high, then again with the clock input low, with all other inputs low
and all outputs open.



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