MF10ACWM datasheet(2/30 Pages) TI1

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MF10

Universal Monolithic Dual Switched Capacitor Filter

General Description

The MF10 consists of 2 independent and extremely easy to

use, general purpose CMOS active filter building blocks.

Each block, together with an external clock and 3 to 4

resistors, can produce various 2nd order functions. Each

building block has 3 output pins. One of the outputs can be

configured to perform either an allpass, highpass or a notch

function; the remaining 2 output pins perform lowpass and

bandpass functions. The center frequency of the lowpass

and bandpass 2nd order functions can be either directly

dependent on the clock frequency, or they can depend on

both clock frequency and external resistor ratios. The center

frequency of the notch and allpass functions is directly de-

pendent on the clock frequency, while the highpass center

frequency depends on both resistor ratio and clock. Up to 4th

order functions can be performed by cascading the two 2nd

order building blocks of the MF10; higher than 4th order

functions can be obtained by cascading MF10 packages.

Any of the classical filter configurations (such as Butter-

worth, Bessel, Cauer and Chebyshev) can be formed.

For pin-compatible device with improved performance refer

to LMF100 datasheet.

Features

Easy to use

Clock to center frequency ratio accuracy ±0.6%

Filter cutoff frequency stability directly dependent on

external clock quality

Low sensitivity to external component variation

Separate highpass (or notch or allpass), bandpass,

lowpass outputs

O x Q range up to 200 kHz

Operation up to 30 kHz

20-pin 0.3" wide Dual-In-Line package

20-pin Surface Mount (SO) wide-body package

System Block Diagram

01039901

Package in 20 pin molded wide body surface mount and 20 pin molded DIP.

May 2001

DS010399

MF10ACWM 数据表(PDF) 2 Page - Texas Instruments

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