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FEATURES

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1A

1B

1Y

2A

2B

2Y

GND

4B

4A

4Y

3B

3A

3Y

D OR PW PACKAGE

(TOP VIEW)

DESCRIPTION/ORDERING INFORMATION

SN74LVC32A-EP

QUADRUPLE 2-INPUT POSITIVE-OR GATE

SCAS733C – NOVEMBER 2003 – REVISED MARCH 2007

• Inputs Accept Voltages to 5.5 V

• Controlled Baseline

• Max t

–

One Assembly/Test Site, One Fabrication

• Typical V

Site

<0.8 V at V

• Extended Temperature Performance of

• Typical V

–40

°C to 125°C and –55°C to 125°C

>2 V at V

• Enhanced Diminishing Manufacturing Sources

• ESD Protection Exceeds JESD 22

(DMS) Support

–

2000-V Human-Body Model (A114-A)

• Enhanced Product-Change Notification

–

200-V Machine Model (A115-A)

–

1000-V Charged-Device Model (C101)

• ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

• Operates From 2 V to 3.6 V

(1)

Component qualification in accordance with JEDEC and

industry standards to ensure reliable operation over an

extended temperature range. This includes, but is not limited

to, Highly Accelerated Stress Test (HAST) or biased 85/85,

temperature cycle, autoclave or unbiased HAST,

electromigration, bond intermetallic life, and mold compound

life. Such qualification testing should not be viewed as

justifying use of this component beyond specified

performance and environmental limits.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in

a mixed 3.3-V/5-V system environment.

ORDERABLE PART NUMBER

TOP-SIDE MARKING

SOIC – D

Reel of 2500

SN74LVC32AQDREP

LVC32AE

–40

°C to 125°C

TSSOP – PW

Reel of 2000

SN74LVC32AQPWREP

LVC32AE

SOIC – D

Reel of 2500

SN74LVC32AMDREP

LVC32AM

–55

°C to 125°C

TSSOP – PW

Reel of 2000

SN74LVC32AMPWREP

LVC32AM

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(2)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

FUNCTION TABLE

(EACH GATE)

INPUTS

OUTPUT

Y

A

B

H

X

H

X

H

H

L

L

L

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2003–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

On products compliant to MIL-PRF-38535, all parameters are

Instruments standard warranty. Production processing does not

tested unless otherwise noted. On all other products, production

necessarily include testing of all parameters.

processing does not necessarily include testing of all parameters.