TNETX4090 datasheet(62/78 Pages) TI1

62 / 78 page

TNETX4090

ThunderSWITCH II™ 9-PORT 100-/1000-MBIT/S ETHERNET™ SWITCH

SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

physical medium attachment interface (port 8)

receive

PMA receive (see Figure 16)

NO.

MIN

MAX

UNIT

tc(Mxx_RBC)

Cycle time, receive byte clock 0 and 1 (Mxx_RCLK, Mxx_COL)

–

tdrift(Mxx_RBC)

Drift rate† of receive bye clock 0 and 1

0.2

2,3

tw(Mxx_RBC)

Pulse duration, Mxx_RCLK, Mxx_COL low or high

40%

60%

tsu(Mxx_RXD)

Setup time, Mxx_RXD7–Mxx_RXD0 valid before Mxx_RCLK/COL

↑

2.5

tsu(Mxx_RXDV)

Setup time, Mxx_RXDV valid before Mxx_RCLK/COL

↑

2.5

tsu(Mxx_RXER)

Setup time, Mxx_RXER valid before Mxx_RCLK/COL

↑

2.5

th(Mxx_RXD)

Hold time, Mxx_RXD7–Mxx_RXD0 valid after Mxx_RCLK/COL

↑

1.5

th(Mxx_RXDV)

Hold time, Mxx_RXDV valid after Mxx_RCLK/COL

↑

1.5

th(Mxx_RXER)

Hold time, Mxx_RXER valid after Mxx_RCLK/COL

↑

1.5

tskew(Mxx_RBC)

Skew between receive byte clock 1 and receive byte clock 0

7.5

8.5

† tdrift is the (minimum) time for either RBC0 or RBC1 to drift from 63.5 MHz to 64.5 MHz or 60 Mhz to 59 MHz from their lock value. It is applicable

under all input signal conditions (except under certain circumstances during comma detection), including invalid or absent input signals, if the

receiver clock recovery unit was previously locked to Mxx_RFCLK or to a valid input signal.

Receive Byte

Clock 0

Data Group

Comma Detect

Receive

Code Group

Receive Byte

Clock 0

Figure 16. PMA Receive

TNETX4090 数据表(PDF) 62 Page - Texas Instruments

TNETX4090 数据表(HTML) 62 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

数据表下载