| 数据搜索系统,热门电子元器件搜索 |
|
TNETE100PCE 数据表(PDF) 21 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TNETE100PCE 数据表(HTML) 21 Page - Texas Instruments |
|
21 / 26 page ![]() ThunderLAN ™ TNETE100 PCI ETHERNET ™ CONTROLLER SINGLE-CHIP 10 BASE-T WITH MII FOR 100 BASE-T/100VG-AnyLAN ™ SPWS017B – APRIL 1995 – REVISED AUGUST 1996 21 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 timing requirements for MDIO (see Figure 6) MIN MAX UNIT ta(MDCLKH-MDIOV) Access time, MDIO valid from MDCLK high (see Note 20) 0 300 ns switching characteristics for MDIO (see Figure 7) PARAMETER MIN MAX UNIT td(MDIOV-MDCLKH) Delay time, MDIO valid to MDCLK high (see Note 21) 10 ns td(MDCLKH-MDIOX) Delay time, MDCLK high to MDIO changing (see Note 21) 10 ns NOTES: 20. When the MDIO signal is sourced by the PMI /PHY, it is sampled by TNETE100 synchronous to the rising edge of MDCLK. 21. MDIO is a bidirectional signal that can be sourced by TNETE100 or the PMI /PHY. When TNETE100 sources the MDIO signal, TNETE100 asserts MDIO synchronous to the rising edge of MDCLK. ta(MDCLKH-MDIOV) MDCLK MDIO Figure 6. Management Data I/O Timing (Sourced by PHY) td(MDIOV-MDCLKH) td(MDCLKH-MDIOX) MDCLK MDIO Figure 7. Management Data I/O Timing (Sourced by TNETE100) |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |