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TNETEL1200 数据表(PDF) 3 Page - Texas Instruments |
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TNETEL1200 数据表(HTML) 3 Page - Texas Instruments |
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3 / 20 page ![]() TNETEL1200 EtherLoop ™ MODEM SPHS003D – FEBRUARY 1999 – REVISED JUNE 1999 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) Figure 3 shows a block diagram of a typical SE EtherLoop modem. Data flow follows the same path as in the CE EtherLoop modem. In the SE application, the EtherLoop processor also performs round-robin arbitration between each of the attached EtherLoop transceiver devices. POTS Line POTS Line POTS Line Ethernet Network Ethernet Interface EtherLoop Processor TNETEL1200 EtherLoop Modem DAC ADC SRAM EtherLoop Transceiver EtherLoop Transceiver EtherLoop Transceiver Figure 3. Typical SE EtherLoop Modem summary of TNETEL1200 EtherLoop modem D Modulates serial HDLC data stream and presents results to DAC D Demodulates data from analog-to-digital converter (ADC) and presents results as an HDLC data stream D Supports wide range of data symbol rates to accommodate a range of line conditions |
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