ADM3252EABCZ datasheet(7/16 Pages) AD

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Data Sheet

ADM3252E

Rev. 0 | Page 7 of 16

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 2. Pin Configuration

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

A1, L1

No Connect. These pins are left unconnected.

A2, B1, B2

VCC

Power Supply Input. A 10 μF and a 0.1 μF decoupling capacitor are required between VCC and ground.

The device requires a voltage between 3.0 V and 5.5 V.

A10, B10, C10

VISO

Supply Voltage for Isolator Secondary Side. A 10 μF and a 0.1 μF decoupling capacitor are required

between VISO and ground.

A11, L11

DNC

Do Not Connect. Do not connect or route anything through these pins.

B11

V+

Internally Generated Positive Supply.

C1, C2, D2, E1, E2,

F2, G1, G2, H2, J1,

J2, K2, L2

GND

Ground Reference for Logic Side.

C11, E11, G10, G11

C1+, C1−,

C2−, C2+

Positive and Negative Connections for Charge Pump Capacitors. External Capacitors C1 and C2 are

connected between these pins; a 0.1 μF capacitor is recommended, but larger capacitors of up to 10 μF

can be used.

TIN1

Transmitter (Driver) Input 1. A logic low on this input generates a high on TOUT1; a logic high on this

input generates a low on TOUT1. This pin accepts TTL/CMOS levels. This is a high impedance input pin;

therefore, it should not be left floating.

D10, E10, F10, H10,

J10, K10, L10

GNDISO

Ground Reference for Isolated RS-232 Side.

D11

TOUT1

Transmitter (Driver) Output 1. This pin outputs RS-232 signal levels.

TIN2

Transmitter (Driver) Input 2. A logic low on this input generates a high on TOUT2; a logic high on this

input generates a low on TOUT2. This pin accepts TTL/CMOS levels. This is a high impedance input pin;

therefore, it should not be left floating.

F11

TOUT2

Transmitter (Driver) Output 2. This pin outputs RS-232 signal levels.

ROUT1

Receiver Output 1. This pin outputs CMOS logic levels.

H11

RIN1

Receiver Input 1. A logic low on this input generates a high on ROUT1; a logic high on this input generates a

low on ROUT1. This input pin accepts RS-232 signal levels and has an internal 5 kΩ pull-down resistor.

J11

V−

Internally Generated Negative Supply.

ROUT2

Receiver Output 2. This pin outputs CMOS logic levels.

K11

RIN2

Receiver Input 2. A logic low on this input generates a high on ROUT2; a logic high on this input generates a

low on ROUT2. This input pin accepts RS-232 signal levels and has an internal 5 kΩ pull-down resistor.

BALLS IN COLUMN 3 TO

COLUMN 9 REMOVED

FOR ISOLATION

TOP VIEW

(Not to Scale)

ADM3252E

VCC

GND

VCC

GND

TIN1

GND

TIN2

GND

ROUT1

GND

ROUT2

VISO

GNDISO

C2–

GNDISO

DNC

V+

C1+

TOUT1

C1–

TOUT2

C2+

RIN1

V–

RIN2

DNC

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