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LC75897PW 数据表(PDF) 2 Page - Sanyo Semicon Device |
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LC75897PW 数据表(HTML) 2 Page - Sanyo Semicon Device |
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2 / 34 page  LC75897PW No.A0549-2/34 Specifications Absolute Maximum Ratings at Ta = 25 °C, VSS = 0V Parameter Symbol Conditions Ratings Unit VDD max VDD -0.3 to +7.0 Maximum supply voltage VLCD max VLCD -0.3 to +7.0 V VIN1 CE, CL, DI, INH -0.3 to +7.0 VIN2 OSC -0.3 to VDD+0.3 Input voltage VIN3 VLCD1, VLCD2 -0.3 to VLCD+0.3 V VOUT1 OSC -0.3 to VDD+0.3 Output voltage VOUT2 VLCD0, S1 to S129, COM1 to COM4, P1 to P8 -0.3 to VLCD+0.3 V IOUT1 S1 to S129 300 µA IOUT2 COM1 to COM4 3 Output current IOUT3 P1 to P8 5 mA Allowable power dissipation Pd max Ta = 85 °C 200 mW Operating temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +125 °C Allowable Operating Ranges at Ta = -40 to +85 °C, VSS = 0V Ratings Parameter Symbol Conditions min typ max unit VDD VDD 2.7 6.0 VLCD, VLCD0 = 0.70VLCD to 0.95VLCD 4.0 6.0 Supply voltage VLCD VLCD, VLCD0 = VLCD 2.7 6.0 V Output voltage VLCD0 VLCD0 2.7 VLCD V VLCD1 VLCD1 2/3VLCD0 VLCD0 Input voltage VLCD2 VLCD2 1/3VLCD0 VLCD0 V VIH1 CE, CL, DI, INH 0.8VDD 6.0 Input high-level voltage VIH2 OSC external clock operating mode 0.7VDD VDD V VIL1 CE, CL, DI, INH 0 0.2VDD Input low-level voltage VIL2 OSC external clock operating mode 0 0.3VDD V Recommended external resistor for RC oscillation ROSC OSC RC oscillator operating mode 10 k Ω Recommended external capacitor for RC oscillation COSC OSC RC oscillator operating mode 470 pF Guaranteed range of RC oscillation fOSC OSC RC oscillator operating mode 150 300 600 kHz External clock operating frequency fCK OSC external clock operating mode [Figure 4] 150 300 600 kHz External clock duty cycle DCK OSC external clock operating mode [Figure 4] 30 50 70 % Data setup time tds CL,DI [Figure 2],[ Figure 3] 160 ns Data hold time tdh CL,DI [Figure 2],[ Figure 3] 160 ns CE wait time tcp CE,CL [Figure 2],[ Figure 3] 160 ns CE setup time tcs CE,CL [Figure 2],[ Figure 3] 160 ns CE hold time tch CE,CL [Figure 2],[ Figure 3] 160 ns High-level clock pulse width t φH CL [Figure 2],[ Figure 3] 160 ns Low-level clock pulse width t φL CL [Figure 2],[ Figure 3] 160 ns Rise time tr CE, CL, DI [Figure 2],[ Figure 3] 160 ns Fall time tf CE, CL, DI [Figure 2],[ Figure 3] 160 ns INH switching time tc INH, CE [Figure 5],[ Figure 6] 10 µs |
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