STULPI01A_12 datasheet(23/44 Pages) STMICROELECTRONICS

23 / 44 page

STULPI01A, STULPI01B

Block description

Doc ID 14817 Rev 4

23/44

Low-power mode is exited by asserting the STP pin high. PLL is started immediately, and

when the clock becomes stable, it is passed on the output of the CLK pin. Then, after a

minimum of 5 clock cycles, DIR is deasserted and Low-power mode is exited. The

SuspendM bit is reset to 1b.

Note:

The STP signal must be kept high until the DIR is deasserted, otherwise Low-power mode is

not exited.

6.16

Power-down mode

Power-down mode is entered by asserting the CSn/PWRDN pin high. Internal voltage

regulators are disabled, and the device has minimum possible power consumption. The

STULPI01 has no wake-up capability or USB functionality during Power-down mode. This

mode can be exited by deasserting the CSn/PWRDN pin. Voltage regulators are turned on

and the internal power-on reset circuit resets the chip to initial state. ULPI interface pins are

in high impedance state during Power-down mode.

6.17

VIO OFF mode

If VDVIO is below the minimum value, VIO OFF mode is entered. The behavior of the device

in VIO OFF mode is the same as in Power-down mode.

6.18

Startup procedure

6.18.1

ULPI device detection

The link detects ULPI device presence by sampling the DIR signal at the reset time

(Figure 8). The NXT signal is '0' after reset to signal an 8-bit device to the link controller.

CLK is '1' to signal a DDR capable device.

6.18.2

SDR mode selection

The STULPI01 samples the D0 line on the first rising edge of the output clock on the CLK

pin. When the sampled value is '0', the STULPI01 remains in SDR mode.

SDR mode can be selected again only after hardware reset. During software reset mode,

selection is not performed.

Table 11.

Low-power mode

Signal

Map to

Dir

Description

Linestate (0)

out

Driven combinatorially from SE receivers

Linestate (1)

out

Driven combinatorially from SE receivers

Reserved

out

Reserved

INT

out

Active high interrupt indication. Asserted whenever

any unmasked interrupt occurs.

STULPI01A 数据表(PDF) 23 Page - STMicroelectronics

STULPI01A 数据表(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

数据表下载