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STUSB06E 数据表(PDF) 11 Page - STMicroelectronics

部件名 STUSB06E
功能描述  3.3 V USB transceiver
PDF  20 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STUSB06E 数据表(HTML) 11 Page - STMicroelectronics

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STUSB06E
Functional description
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5
Functional description
The STUSB06E is designed to provide USB connectivity in mobile systems. The
STUSB06E can operate down to digital I/O supply voltages of 1.6 V and still meet USB
physical layer specifications. The STUSB06E takes typical 3.3 V supply voltage, VREG, to
operate the transceiver. The system voltage, VCC_IO, is used to set the reference voltage
required by the digital I/O lines interfacing to the system controller. Internal circuitry provides
translation between the USB and system voltage domains. VCC_IO will typically be the main
supply voltage rail for the controller.
In addition, a termination supply voltage, VPU, is provided to support speed selection. VPU
can be disabled or enabled under software control via the SOFTCON input. This allows for
software-controlled connect or disconnect states. A 1.5 k
Ω resistor is required to be
connected between this pin and the D+ (full-speed) or D- (low-speed) line; according to
Table 6 behavior, sometimes, an internal weak pull-up resistor is connected instead.
The VREG Input voltage ranging form 3 V to 3.6 V must be provided as main power supply.
The STUSB06E also supports sharing mode in which some pins are made 3-state to allow
data lines sharing.
5.1
Power supply configurations
The STUSB06E supports four power supply configurations.
Operating mode: Both VCC_IO and VREG are present. This is the standard configuration for
normal operation.
Disable mode: VREG is connected while VCC_IO is disconnected. D+ and D- pins are three-
stated and the power consumption is reduced.
Sharing mode: VCC_IO is connected while VREG is disconnected. HIGHZ input is left
floating or driven low. D+ and D- pins are three-stated and the differential data lines can be
shared with signals of up to 3.6 V. Power consumption is reduced in this mode. The pins VP
and VM are driven high and pin RCV is driven low.
High-Z mode: VCC_IO is connected while VREG is disconnected. High-Z input must be
driven High. Every output pin is three-stated and the differential data lines can be shared
with signals of up to 3.6 V. Power consumption is reduced in this mode. Refer to the
functional tables for more details regarding pin's status in these power modes.
Charger detection mode: An embedded weak pull-up resistor of 150 k
Ω is used to
implement a resistive detection mechanism. According to USB Battery Charger
Specification rel.1.1, this method will reliably detect:
– Rechargeable Portable Device attached to Dedicated Charger Port or
– Rechargeable Portable Device attached to Standard Host Port.



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