STA515W

Electrical characteristics

Doc ID 11079 Rev 2

7/14

Test circuits

Figure 3.

Test circuit

Figure 4.

Current dead time test circuit

Table 7.

Threshold switching voltage variation with voltage on pin VL

Unit

2.7

0.7

1.5

V

3.3

0.8

1.7

V

5.0

0.85

1.85

V

Table 8.

Logic truth table

Pin

TRISTATE

Inputs as per Figure 4

Transistors as per Figure 4

Output mode

INxA

INxB

Q1

Q2

Q3

Q4

0

x

x

Off

Off

Off

Off

Hi Z

100Off

Off

On

On

Dump

101Off

On

On

Off

Negative

110On

Off

Off

On

Positive

111On

On

Off

Off

Not used

Low current dead time = MAX(DTr,DTf)

OUTxY

Vcc

(3/4)Vcc

(1/2)Vcc

(1/4)Vcc

t

DTf

DTr

Duty cycle = 50%

INxY

OUTxY

gnd

+Vcc

R 8

Ω

+

-

vdc = Vcc/2

D03AU1458

High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B))

Rload=8

Ω

Q2

OUTB

DTout(B)

DTin(B)

DTout(A)

C71 470nF

C70

470nF

C69

470nF

Iout=4.5A

Iout=4.5A

Q4

Q1

Q3

INB

D03AU1517

INA

DTin(A)

Duty cycle=A

Duty cycle=B

Duty cycle A and B: Fixed to have DC output current of 4.5A in the direction shown in figure

L68 22

µ

L67 22

µ

OUTA