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M24LR16E-R 数据表(PDF) 135 Page - STMicroelectronics |
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M24LR16E-R 数据表(HTML) 135 Page - STMicroelectronics |
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135 / 143 page ![]() M24LR16E-R Package mechanical data Doc ID 018932 Rev 8 135/143 Figure 88. UFDFPN8 (MLP8) – 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, package outline 1. Drawing is not to scale. 2. The central pad (E2 × D2 area in the above illustration) is internally pulled to VSS. It must not be allowed to be connected to any other voltage or signal line on the PCB, for example during the soldering process. 3. The circle in the top view of the package indicates the position of pin 1. Table 128. UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead 2 x 3 mm, data Symbol millimeters inches(1) 1. Values in inches are converted from mm and rounded to 4 decimal digits. Typ Min Max Typ Min Max A 0.550 0.450 0.600 0.0217 0.0177 0.0236 A1 0.020 0.000 0.050 0.0008 0.0000 0.0020 b 0.250 0.200 0.300 0.0098 0.0079 0.0118 D 2.000 1.900 2.100 0.0787 0.0748 0.0827 D2 (rev MC) 1.200 1.600 0.0472 0.0630 E 3.000 2.900 3.100 0.1181 0.1142 0.1220 E2 (rev MC) 1.200 1.600 0.0472 0.0630 e 0.500 0.0197 K 0.300 0.0118 L 0.300 0.500 0.0118 0.0197 L1 0.150 0.0059 L3 0.300 0.0118 eee(2) 2. Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from measuring. 0.080 0.0031 D E ZW_MEe A A1 eee L1 e b D2 L E2 L3 L1 e b D2 L E2 L3 Pin 1 K K MB MC |
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