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SRI2K 数据表(PDF) 16 Page - STMicroelectronics

部件名 SRI2K
功能描述  13.56 MHz short-range contactless memory chip with 2048-bit EEPROM and anticollision functions
PDF  45 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

SRI2K 数据表(HTML) 16 Page - STMicroelectronics

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Memory mapping
SRI2K
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Doc ID 15779 Rev 3
4.2
32-bit binary counters
The two 32-bit binary counters located at block addresses 5 and 6, respectively, are used to
count down from 232 (4096 million) to 0. The SRI2K uses dedicated logic that only allows
the update of a counter if the new value is lower than the previous one. This feature allows
the application to count down by steps of 1 or more. The initial value in Counter 5 is
FFFF FFFEh and is FFFF FFFFh in Counter 6. When the value displayed is 0000 0000h,
the counter is empty and cannot be reloaded. The counter is updated by issuing the
Write_block command to block address 5 or 6, depending on which counter is to be
updated. The Write_block command writes the new 32-bit value to the counter block
address. Figure 16 shows examples of how the counters operate.
The counter programming cycles are protected by automated antitearing logic. This function
allows the counter value to be protected in case of power down within the programming
cycle. In case of power down, the counter value is not updated and the previous value
continues to be stored.
Figure 15.
Binary counter (addresses 5 to 6)
Figure 16.
Countdown example (binary format)
The counter with block address 6 controls the Reload command used to reset the resettable
OTP area (addresses 0 to 4). Bits b31 to b21 act as an 11-bit Reload counter; whenever one
of these 11 bits is updated, the SRI2K detects the change and adds an Erase cycle to the
Write_block command for locations 0 to 4 (see the “Resettable OTP area” paragraph). The
Erase cycle remains active until a Power-off or a Select command is issued. The SRI2K’s
resettable OTP area can be reloaded up to 2 047 times (211-1).
Block
Address
MSb
b31
32-bit block
b16 b15
b24 b23
b8 b7
LSb
b0
Description
Count down
Counter
5
6
32-bit binary counter
32-bit binary counter
ai07660b
ai07661
1
...1111111111111
1
...111111111111
0
1
...
11111111111
01
Initial data
1-unit decrement
1-unit decrement
b31
b0
1
...
11111111111
00
1
...
111111111
0100
1
...111111111
1000
1-unit decrement
8-unit decrement
Increment not allowed



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