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STI5197 数据表(PDF) 2 Page - STMicroelectronics

部件名 STI5197
功能描述  Cost-effective QAM demodulator and MPEG2 decoder for SD set-top box applications
PDF  4 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STI5197 数据表(HTML) 2 Page - STMicroelectronics

  STI5197 Datasheet HTML 1Page - STMicroelectronics STI5197 Datasheet HTML 2Page - STMicroelectronics STI5197 Datasheet HTML 3Page - STMicroelectronics STI5197 Datasheet HTML 4Page - STMicroelectronics  
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Introduction
STi5197L, STi5197
2/4
Doc ID 15456 Rev 3
1
Introduction
The STi5197 uses state-of-the-art process technology to provide an ultra low cost, full
featured, SD set-top box SoC. It is a highly integrated solution combining QAM
demodulation, audio/video decoding and applications processing into a single chip, suitable
for MPEG2-based Cable networks worldwide.
The STi5197 provides a solution for operators to specify a range of low cost SD STBs
including low cost Zappers, Interactive STBs and DVR-capable STBs, with content delivery
using broadcast or broadband networks, or both (Hybrid STBs).
The STi5197 is optimized for secure Pay-TV applications with integrated DVB, DES, Multi2
and ICAM descramblers and smartcard interfaces.
The STi5197 offers enhancements in performance, features and integration to current users
of ST’s MPEG2 SD family of audio/video decoders and QAM demodulators, whilst reducing
cost and time-to-market for the next generation of deployments. Few external components
are required to realize a complete STB solution, resulting in very low BOM cost.
Features
Benefits
Combines a configurable QAM demodulator
with STB decoding and display functions.
This highly integrated SoC helps to reduce board
area and manufacturing cost, allowing low-cost,
small-size STBs to be designed for DVB-S
networks.
ST40 applications CPU,
32K I cache, 32K D cache.
Superscalar performance from a single CPU core,
using standard tools and operating systems (Linux,
OS21).
STMicroelectronics’ video decoding system with
Blitter display.
Allows dual SD decoding of MPEG2 video with PIP
capability.
Integrated USB 2.0 host,
Ethernet MAC with MII/RMII.
Enables connectivity to HDD for PVR systems and
to Ethernet networks for IP TV and hybrid/IP STBs.
Low power process, design and architecture.
Low operating power consumption.
Best in class, low-power standby mode. Fast
resume from standby.
Available in 15×15 package with ballout
optimized for 2-layer PCBs.
Reduced board manufacturing costs and board
size.
Support for Serial Flash including secure boot.
Allows low cost BOM, and safeguards boot code
integrity.



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