Introduction

STi7106

4/13

Doc ID 16517 Rev 1

Display and output

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Main and aux video display pipelines:

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Main: high quality H & V reformatting/resizing with sample rate conversion/filtering.

Motion and detail adaptive spatial and temporal deinterlacing for 480p/576p and

1080p60 progressive output; film mode detection

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Aux: high quality H & V reformatting/resizing with sample rate conversion/filtering

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Three independent graphics planes with H & V resize, CLUT and anti-flicker filtering

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Link list based 2D graphics blitter

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Up to 266 Mpixels/sec with destination alpha blending

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Capable of high performance animated 3D user interface effects with tile RAM

bandwidth saver enhancement

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Run length decoding support for BD

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Independent main and aux display compositions (video/graphics mixing)

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Pass-through display for graphics, main video or aux video output concurrently with

main and aux compositions

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HD display capture and down-conversion for concurrent HD and SD output of the main

composition

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HDMI interface with HDCP copy protection (HD/ED/SD formats up to 1080p60)

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Is in full compliance with all features of v1.3a, including deep color, enhanced

colorimetry pass through (xvYCC, gamut metadata), 8 ch PCM, high bit rate

(HBR) audio, and CEC

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Display output:

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16-bit digital video output (DVO) for main display composition (HD/ED/SD formats

up to 1080p60)

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Second 24-bit DVO for pass through display or main/aux display compositions

(HD/ED/SD formats up to 1080p60)

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Macrovision and Dwight Cavendish copy protection support

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PAL/NTSC/SECAM digital encoder

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Six 10-bit DACs for component/composite analog video output (HD/ED/SD

formats up to 1080i)

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SD/HD digital video input port, 8- or 16-bit YCbCr

Connectivity

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Dual USB 2.0 host interfaces both with PHY

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Integrated 10/100/1000 Ethernet GMAC, Wake-on-LAN, multiple h/w address filters

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Supports 10/100 MII/RMII, Turbo-MII (TMII) up to 300 Mbits/sec and GMII up to

1000 Mbits/sec

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Second Ethernet MAC supporting 10/100 MII/RMII

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Soft modem support: integrated MAFE: integrated system side DAA (Si-Labs)