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CXP-85232A 数据表(PDF) 12 Page - Sony Corporation |
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CXP-85232A 数据表(HTML) 12 Page - Sony Corporation |
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12 / 20 page ![]() – 12 – CXP85112B/85116B, CXP85220A/85224A/85228A/85232A AC Characteristics (1) Clock timing ∗1 tsys indicates the three values below according to the upper two bits (CPU clock selection) of the clock control register (address: 00FEH). tsys [ns] = 2000/fc (upper two bits = "00"), 4000/fc (upper two bits = "01"), 16000/fc (upper two bits = "11") System clock frequency System clock input pulse width System clock input rise time, fall time Event clock input clock pulse width Event count input clock rise time, fall time fC tXL, tXH tCR, tCF tEH, tEL tER, tEF XTAL EXTAL EXTAL EXTAL EC EC MHz ns ns ns ms Item Symbol Pins Conditions Min. Max. Unit Fig. 1, Fig. 2 Fig. 1, Fig. 2 External clock drive Fig. 1, Fig. 2 External clock drive Fig. 3 Fig. 3 4.5 200 20 3.5 100 tsys + 50∗1 (Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V reference) Fig. 1. Clock timing EXTAL tXH tXL tCF tCR 0.4V VDD – 0.4V 1/fc Fig. 2. Clock applying condition Crystal oscillation Ceramic oscillation EXTAL XTAL External clock EXTAL XTAL OPEN C1 C2 Fig. 3. Event count clock timing EC tEH tEL tEF tER 0.2VDD 0.8VDD |
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