SMB113A/B/SMB117/A

Preliminary Information

Summit Microelectronics, Inc

2111 2.6 9/16/2010

21

APPLICATIONS INFORMATION (CONTINUED)

Figure 9 – Applications schematic showing SMB113A operation from a +12V input supply

.

R30

47K

D8

Q1

NPN

C18

0.1uF

D9

R12

1K

R39 100

D3 Schottky

C20

22uF

C22

0.1uF

R28 4.99K

R13 0

C46

22uF

C47

0.1uF

R29 499

C48

330pF

C49

22pF

C50

3300pF

CH3

1

R10

1K

D10

C11

0.1uF

HOST_RESET

1

VBATT

1

R37 100

C13

0.1uF

C25

0.1uF

R24 4.99K

C40

22uF

L2

3.3uH

Q2(P)

Q1(N)

Q4

FDC6420C

C41

0.1uF

R25 499

C42

330pF

C43

22pF

C44

3300pF

D11

CH1

1

C24

0.1uF

PWREN0

1

R16 1K

D5 Schottky

C27

22uF

C29

0.1uF

U1

SMB113A

HSDRV_CH0

1

HEALTHY

2

COMP1_CH0

3

COMP2_CH0

4

VM_CH0

5

SDA

6

SCL

7

LSDRV_CH1

8

HVSUP1

9

HSDRV_CH1

10

HOST_RESET

11

COMP1_CH1

12

COMP2_CH1

13

VM_CH1

14

VDDCAP

15

VBATT

16

LSDRV_CH2

17

HVSUP2

18

HSDRV_CH2

19

COMP2_CH2

20

COMP1_CH2

21

VM_CH2

22

LSDRV_CH3

23

HVSUP3

24

HSDRV_CH3

25

PWREN0

26

COMP2_CH3

27

COMP1_CH3

28

VM_CH3

29

LSDRV_CH0

31

HVSUP0

32

R17 0

+12V

C19

0.1uF

R14 100

L3

3.3uH

Q2(P)

Q1(N)

Q3

FDC6420C

C21

0.1uF

C30

0.1uF

R19 1K

D6 Schottky

C31

22uF

C32

0.1uF

R20 0

L1

3.3uH

CH2

1

Q2(P)

Q1(N)

Q5

FDC6420C

VBATT

SCL

SDA

VBATT

L4

3.3uH

Q2(P)

Q1(N)

Q2

FDC6420C

R1 4.99K

C5

22uF

C7

0.1uF

R2 499

C8

330pF

C9

22pF

C10

3300pF

R3 100

VIN

CH0

1

VIN

R9

49.9K

HEALTHY/nRESET

1

NP

VBATT

VIN

VBATT

DongleVCC

J1

I2C

Gnd

1

SCL

2

Gnd3

3

SDA

4

Rsrv5

5

MR

6

+10V

7

Rsrv8

8

+5V

9

Rsrv10

10

SDA

SCL

DongleVCC

R7

47K

D2

VIN

SW1

Optional For Programming SMB113A

VIN

C14

0.1uF

C15

1uF

C1

0.1uF

C2

1uF

C12

0.1uF

R4 1K

D1 Schottky

C16

22uF

C17

0.1uF

R5 0

D7

5.6V

R22 4.99K

C34

22uF

C35

0.1uF

R23 499

C36

330pF

C37

22pF

C38

3300pF