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SMB214C 数据表(PDF) 6 Page - Summit Microelectronics, Inc.

部件名 SMB214C
功能描述  High-power, Three-channel Programmable DC-DC System Power Managers
PDF  27 Pages
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制造商  SUMMIT [Summit Microelectronics, Inc.]
网页  http://www.summitmicro.com
标志 SUMMIT - Summit Microelectronics, Inc.

SMB214C 数据表(HTML) 6 Page - Summit Microelectronics, Inc.

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SMB214A/B/C
Summit Microelectronics, Inc
2128 2.2 9/17/2010
6
PIN DESCRIPTION
Pin Number
Pin Type
Pin Name
Pin Description
14
IN
VM_CH1
The VM_CH1 (Channel 1 Voltage Monitor) pin connects the channel 1
step-down controller output. Internally the VM_CH1 pin connects to an
internal programmable resistor divider.
15
CAP
VDD_CAP
The VDD_CAP (VDD Capacitor) pin is an external capacitor input used
to filter the internal supply.
16
PWR
VBATT
Power supply to part.
17
OUT
LSDRV_CH2
The LSDRV_CH2 (Channel 2 Low-side Driver) pin is the lower
switching node of the channel 2 synchronous step-down buck
controller. Attaches to the gate of n-channel MOSFET.
18
PWR
HVSUP2
Channel 2 High Voltage Supply for Channel 2 buck driver.
19
OUT
HSDRV_CH2
The HSDRV_CH2 (Channel 2 High-side Driver) pin is the upper
switching node of the channel 2 synchronous step-down buck
controller. Attach to the gate of p-channel MOSFET. A delay exists
between the assertion of HSDRV_CH2 and assertion of LSDRV_CH2
to prevent excessive current flow during switching.
20
IN
COMP2_CH2
The COMP2_CH2 (Channel 2 secondary Compensation) pin is the
secondary compensation input of the channel 2 step-down buck
controller.
21
IN
COMP1_CH2
The COMP1_CH2 (Channel 2 primary Compensation) pin is the
primary compensation input of the channel 2 step-down buck
controller. Each pin is internally connected to a programmable resistor
divider.
22
IN
VM_CH2
The VM_CH2 (Channel 2 Voltage Monitor) pin connects the channel 6
step-down controller output. Internally the VM_CH2 pin connects to an
internal programmable resistor divider.
26
IN
PWREN
The PWREN (Power Enable) pin is a programmable input used to
enable (disable) selected supplies. This pin can also be programmed
to latch and act as a debounced, manual push button input. Active high
when level triggered, active low when used as a push- button input.
When unused this pin should be tied to a solid logic level.
30
PWR
GND
Ground
31
OUT
LSDRV_CH0
The LSDRV_CH0 (Channel 0 Low-side Driver) pin is the lower
switching node of the channel 0 synchronous step-down buck
controller. Attach to the gate of n-channel MOSFET.
32
PWR
HVSUP0
Channel 0 High Voltage Supply used to power the channel 0 buck
driver.
PAD
PWR
GND
Exposed metal (thermal) Pad on bottom of SMB214A/B/C. The thermal
pad of the QFN package must be connected to the PCB GND.
23, 24, 25,
27, 28, 29
N/C
N/C
No Connect



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