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ICX082AL 数据表(PDF) 5 Page - Sony Corporation |
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ICX082AL 数据表(HTML) 5 Page - Sony Corporation |
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5 / 16 page ![]() – 5 – ICX082AL Item VVT VVH1, VVH2, VVH3, VVH4 VVL1, VVL2, VVL3, VVL4 V φV | VVH1 – VVH2 | VVH3 – VVH VVH4 – VVH VVHH VVHL VVLH VVLL V φH VHL V φRG VRGL V φSUB 14.5 –0.6 8.9 –0.5 –0.5 6.0 –3.5 6.0 0 27.0 15.0 –9.6 15.5 0 0.2 0 0 0.8 1.0 0.8 0.8 8.0 –3.0 13.0 3.0 32.0 V V V V V V V V V V V V V V V V 1 2 2 2 2 2 2 2 2 2 2 3 3 3 3 4 VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 V φV = VVHn – VVLn (n = 1 to 4) High-level coupling High-level coupling Low-level coupling Low-level coupling ∗1 Readout clock voltage Vertical transfer clock voltage Horizontal transfer clock voltage Reset gate clock voltage Substrate clock voltage Symbol Min. Typ. Max. Unit Waveform diagram Remarks Clock Voltage Conditions ∗1 The reset gate clock voltage need not be adjusted when the reset gate clock is driven when the specifications are as given below. In this case, the reset gate clock voltage setting indicated on the back of the image sensor has not significance. Reset gate clock voltage Item Symbol Min. Typ. Max. Unit Waveform diagram Remarks VRGL V φRG –0.2 8.5 0 9.0 0.2 9.5 V V 3 3 |
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