WM8253

Production Data

w

PD, Rev 4.1, August 2011

8

INPUT VIDEO SAMPLING

Figure 1 Input Video Timing

Note:

1.

See Page 15 (Programmable VSMP Detect Circuit) for video sampling description.

Test Conditions

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

MCLK period

27.7

ns

MCLK high period

13.85

ns

MCLK low period

13.85

ns

VSMP period

300

1000

ns

VSMP set-up time

6

ns

VSMP hold time

3

ns

Video level set-up time

10

ns

Video level hold time

3

ns

Reset level set-up time

10

ns

Reset level hold time

3

ns

Notes:

1.

2.

Parameters are measured at 50% of the rising/falling edge.

OUTPUT DATA TIMING

MCLK

OP[3:0]

t

PD

t

PD

Figure 2 Output Data Timing

MCLK

VSMP

INPUT

VIDEO

t

PER

t

VSMPSU

t

VSMPH

t

VSU

t

VH

t

RSU

t

RH

t

MCLKL

t

MCLKH

t

VPER

t

RSU