PXS30 Family Built on

Overview

for use in industrial safety applications. All devices in this family are built around a

dual-core safety platform with an innovative safety concept targeting systems with

International Electrotechnical Commission (IEC) 61508 SIL3 safety integrity levels. To

minimize additional software and module-level features, on-chip redundancy is offered

for the critical components of the MCU. Critical components include the CPU core,

DMA controller, interrupt controller, crossbar bus system, memory protection unit, flash

memory and RAM controllers, peripheral bus bridge, system timers and watchdog

timer. Lock step redundancy checking units are implemented at each output of this

sphere of replication. The performance of the PXS30 family is rarely experienced in an

MCU with over 600 possible DMIPs, up to 2 MB of flash and Ethernet communication.

The PXS30 family is part of the SafeAssure program, which is designed to help system

manufacturers more easily achieve compliance with functional safety standards.

Safety with performance

Target Applications

Factory Automation

• Programmable logic control

• Input/output (I/O) control

• Process control, temperature control

• Robotic arm

• Robotic manipulator

Smart Grid and Smart Metering

• Residential solar power inverters

• Commercial solar power inverters

• Off-grid solar power inverters

Diagnostic and Therapy

• Anesthesia unit monitors

• Ventilators and respirators

Crossbar Masters

Vreg

PXS30 Block Diagram

SPE2

e200 Core

eDMA

Interrupt

Controller

VLE

MMU

FlexRay™

Controller

PDI

SPE2

e200 Core

VLE

MMU

Vreg

eDMA

Interrupt

Controller

Debug

JTAG

Nexus

Memory Protection Unit

Crossbar Switch

Memory Protection Unit

Crossbar Switch

I/O

Bridge

EBI

RC

Flash

(ECC)

I/O

Bridge

MDDR1

RC

RC

Flash

(ECC)

PXS30 Block Diagram