AS2574BP datasheet(4/24 Pages) AMSCO

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Data Sheet

AS2574B

Rev. 1

Jan. 1995

Power On Reset

The on chip analogue power on reset circuit monitors the

supply voltage (V

DD). As long as VDD remains below the

internal reference voltage, V

REF

(typically 1.2V), the

oscillator is inhibited. When V

DD rises above VREF, a reset

signal is generated to assure correct start-up, and the

oscillator is enabled.

The correct start-up/reset condition of the circuit is

guaranteed regardless of the absolute and chronologi-

cal rise time of V

DD, CD and HS inputs.

LineSupervision

In off-hook condition the device performs supervision of

the line current disconnects in the following manner:

Line disconnects (CD low) of less than 2 sec. are ignored

and the device continues operation.

Line disconnects of more than 2 sec. cause stop of

dialling and the circuit is switched to standby mode if HS

is high, otherwise the circuit will return to idle mode.

Mode Selection

The default mode (LD or MF) can be selected by the

diode option mode (diode 6).

When default LD mode is selected, a temporary change

to MF mode can be invoked by pressing the * key.

When the circuit is in temporary MF mode, each of the

Mute Key

Depressing the Mute key activates and deactivates

(toggle switch) the MT output, when internal mute is

inactive, i.e. when no data is being read from the RAM or

FIFO.

A change of the hook state will release the mute.

Valid Keys

A valid key is detected from the keyboard by connecting

the appropriate row to the column. This can be done

using an n x m keyboard matrix with single contacts.

Positive and negative edges of each contact are de-

bounced. The debounce time is 15 ms.

In idle state (on-hook) only the LS key is always valid

independent of the CD pin. When diode 5 is connected,

also the LNR, MEM, and M1 - 9 keys are valid entries

invoking ACP (automatic call progress).

following procedures revert it to default LD mode:

- pressing R key (all subsequently entered digits are

buffered in FIFO),

- by next On-hook.

Last Number Redial

LNR is a facility that allows resignalling of the last

manually dialled number without keying in all the digits

again. The LNR is repeatable.

A manually entered number is automatically stored in the

LNR RAM. The capacity of the RAM is 36 digits. If a

number greater than 36 digits is entered, the LNR facility

will be inhibited (until new entries < 37 digits) and further

entries will be buffered in FIFO. If more than 18 digits are

entered, the display will show the digit 19 and onwards.

Postdialled digits, i.e. digits manually entered after LNR

has been invoked, are not stored in RAM but buffered in

FIFO.

The current contents of the LNR RAM are overwritten by

new entries.

Memory Dial

An on chip RAM enables the dialler to store up to 20

numbers, each containing a maximum 18 digits/data.

The first 10 memories are accessible with 10 Direct dial

keys (M1 to M10) and another 10 memories (11 - 20) are

accessible by pressing the 2nd key before one of the

Direct dial keys or by pressing the MEM key and a digit

0 - 9 (abbreviated dialling).

Basic store procedure:

1 Press Enter key

2 Key in digits, including access code, pauses and recall

as appropriate (number is stored in LNR RAM)

3 Select location by keeping Enter key depressed while

entering the desired location (M1…M10, 2nd

M1…M10, or MEM 0…9)

4 Release Enter key to finish

5 Continue with 1, 2, 3 and 4 for storing further numbers.

Only the first 18 digits/data will be stored when copying

more than 18 digits/data in a memory.

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