AS2578BP datasheet(5/22 Pages) AMSCO

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Data Sheet

Rev. 3

AS2578 /B

March 1997

After a recall a pause will automatically be generated.

The pause time is 3 sec.

The ground loop (GL) has two pulse lengths, namely a

short of 500 ms and a long of 1250 ms.

Short GL: If the recall key is depressed for

≤ 540 ms, the

GL pulse is 500 ms.

Long GL: If the recall key is depressed for > 540 ms, the

GL pulse is 1250 ms.

During redial a ground loop is only executed as a long GL

(1250 ms).

Pause Generation

Pause introduces a delay in signalling digit strings to

accommodate second and subsequent dial tones.

Automatic pauses are generated in the following manner:

- always after a recall independent of the AP pin

- with automatic pause insertion enabled by pin option

or LM code, up to two pauses can be automatically

inserted at any location of the original entry in the RAM

(except location 1 of the digit string), when the mute

output goes inactive (in MF mode for more than 1 sec.)

before next entry.

A pause read from the RAM can be terminated (shortened)

prior to time out by a low level on AP pin (AS2578 only)

during the pause execution. The pause time is 3 sec.

During execution of a pause, mute is inactive, i.e. the

circuit is in speech mode.

Sliding Cursor Procedure (AS2578 only)

To accommodate redialling (LNR) behind a PABX without

using automatic pause generation, a sliding cursor

protocol is implemented. The sliding cursor is enabled

when AP = high. If new entries match the previous RAM

contents, pressing the LNR key will dial out the remaining

digits.

If there is an error in matching, the LNR will be inhibited

until next on-hook, and the RAM will contain the new

number.

Serial Interface

The AS2578 /B support a bidirectional bus oriented

protocol. The protocol defines any device that sends

data onto the bus as a transmitter, and the receiving

device as the receiver. The AS2578 /B are controlling the

transfer and hence the master. The EEPROM being

controlled is the slave.

The AS2578 /B will always initiate data transfer, and

provide the clock for both transmit and receive operations.

Therefore, the protocol is for single master applications

only.

However, a temporary second master can be used to

write into the EEPROM when the AS2578 /B are supplied

and in idle state.

Clock and Data Conventions

Data states on the SDA line can change only during SCL

low. SDA state changes during SCL high are reserved

for indicating start and stop conditions (see figure 1 and

2).

StartCondition

All commands are preceded by the start condition, which

is a high to low transition of SDA when SCL is high. The

slave should continuously monitor the SDA and SCL

lines for the start condition and must not respond to any

command until this condition has been met.

StopCondition

All communications are terminated by a stop condition,

which is low to high transition of SDA when SCL is high.

The stop condition is also used to place the slave in the

standby power mode.

Acknowledge

Acknowledge is a software convention used to indicate

successful data transfers. The transmitting device, either

master or slave, will release the bus after transmitting

eight bits. During the ninth clock cycle the receiver will

pull the SDA line low to acknowledge that it received the

eight bits of data (see figure 3).

The slave should always respond with an acknowledge

after recognition of a start condition and its slave address.

If both the device and a write operation have been

selected, the slave should respond with an acknowledge

after receipt of each subsequent eight bit word.

In the read mode, when the EEPROM has transmitted

eight bits of data, it should release the SDA line and

monitor the line for an acknowledge. If the AS2578 /B

respond with an acknowledge and does not generate a

stop condition, the EEPROM should continue to transmit

data. If the AS2578 /B do not respond with an

acknowledge, the EEPROM should terminate further

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