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AD28MSP02 数据表(PDF) 13 Page - Analog Devices

部件名 AD28MSP02
功能描述  Voiceband Signal Port
PDF  20 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD28MSP02 数据表(HTML) 13 Page - Analog Devices

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AD28msp02
REV. 0
–13–
TIMING PARAMETERS
Clock Signals
Parameter
Min
Max
Unit
Timing Requirement:
tMCK
MCLK Period
76.9
76.9
ns
tMKL
MCLK Width Low
0.5tMCK – 10
0.5tMCK + 10
ns
tMKH
MCLK Width High
0.5tMCK – 10
0.5tMCK + 10
ns
Switching Characteristic:
tSCK
SCLK Period
5tMCK
ns
tSKL
SCLK Width Low
3tMCK – 10
3tMCK + 10
ns
tSKH
SCLK Width High
2tMCK – 10
2tMCK + 10
ns
MCLK
SCLK
t
MCK
t MKL
t MKH
tSCK
tSKL
tSKH
Figure 12. Clock Signals
Serial Port 3-State
Parameter
Min
Max
Unit
Switching Characteristic:
tSPD
CS Low to SDO, SDOFS, SCLK Disable
25
ns
tSPE
CS High to SDO, SDOFS, SCLK Enable
0
ns
tSPV
CS High to SDO, SDOFS, SCLK Valid
10
ns
CS
SDO
SDOFS
SCLK
tSPD
t
SPE
t
SPV
Figure 13. Serial Port 3-State



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