AD2S81A

AD2S82A

Parameter

Conditions

Min

Typ

Max

Min

Typ

Max

Units

RATIO MULTIPLIER

AC Error Output Scaling

10 Bit

177.6

mV/Bit

12 Bit

44.4

44.4

mV/Bit

14 Bit

11.1

mV/Bit

16 Bit

2.775

mV/Bit

PHASE SENSITIVE DETECTOR

Output Offset Voltage

12

12

mV

Gain

In Phase

w.r.t. REF

–0.882

–0.9

–0.918

–0.882

–0.9

–0.918

V rms/V dc

In Quadrature

w.r.t. REF

0.04

0.04

V rms/V dc

Input Bias Current

60

150

60

150

nA

Input Impedance

1

1

M

Ω

Input Voltage

±8

±8V

INTEGRATOR

Open-Loop Gain

At 10 kHz

57

63

57

63

dB

Dead Zone Current (Hysteresis)

100

100

nA/LSB

Input Offset Voltage

1

5

1

5

mV

Input Bias Current

60

150

60

150

nA

Output Voltage Range

±V

±7V

VCO

±V

Maximum Rate

1.0

1.1

1.0

1.1

MHz

VCO Rate

Positive DIR

7.1

7.9

8.7

7.1

7.9

8.7

kHz/

µA

Negative DIR

7.1

7.9

8.7

7.1

7.9

8.7

kHz/

µA

VCO Power Supply Sensitivity

Increase

+0.5

+0.5

%/V

–8.0

–8.0

%/V

Decrease

–8.0

–8.0

%/V

+2.0

+2.0

%/V

Input Offset Voltage

1

5

1

5

mV

Input Bias Current

70

380

70

380

nA

Input Bias Current Tempco

–1.22

–1.22

nA/

°C

Input Voltage Range

±8

±8V

Linearity of Absolute Rate

Full Range

<2

<2

% FSD

Over 0% to 50% of Full Range

<1

<1

% FSD

Reversion Error

1.5

1.5

% FSD

Sensitivity of Reversion Error

±8

±8

%/V of

to Symmetry of Power Supplies

Asymmetry

±2.7

±3.0

±3.3

V/LSB

POWER SUPPLIES

Voltage Levels

+10.8

+13.2

+10.8

+13.2

V

–10.8

–13.2

–10.8

–13.2

V

+5

+13.2

+5

+13.2

V

Current

±V

±12 V

12

23

12

23

mA

±V

±13.2 V

19

30

19

30

mA

±V

±5.0 V

0.5

1.5

0.5

1.5

mA

NOTES

±3 V depending on the resolver direction.

Specifications in boldface are tested on all production units at final electrical test.

Specifications subject to change without notice.

(typical @ +25 C unless otherwise noted)

AD2S81A/AD2S82A–SPECIFICATIONS

ESD SENSITIVITY

The AD2S81A and AD2S82A features an input protection circuit consisting of large “distributed”

diodes and polysilicon series resistors to dissipate both high energy discharge (Human Body Model)

and fast, low energy pulses (Charges Device Model).

strongly recommended to avoid functional damage or performance degradation. For further informa-

tion on ESD precautions, refer to Analog Devices ESD Prevention Manual.

–4–

REV. B

WARNING!

ESD SENSITIVE DEVICE

ORDERING GUIDE

Operating

Temperature

Package

Accuracy

Ranges

Options*

AD2S81AJD

30 arc min

0

°C to +70°C

D-28

AD2S82AHP

22 arc min

–40

°C to +85°C

P-44A

AD2S82AJP

8 arc min

–40

°C to +85°C

P-44A

AD2S82AKP

4 arc min

–40

°C to +85°C

P-44A

AD2S82ALP

2 arc min

–40

°C to +85°C

P-44A

*D = Ceramic DIP Package; P = Plastic Leaded Chip Carrier (PLCC) Package.