AD6402

–3–

REV. 0

WARNING!

ESD SENSITIVE DEVICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD6402 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

RECOMMENDED OPERATING CONDITIONS

VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 V–4.5 V

IFVCC1, IFVCC2, PLLVCC . . . . . . . . . . . . . . . . . . . .2.85 V

Operating Temperature Range . . . . . . . . . . . –25

°C to +85°C

ABSOLUTE MAXIMUM RATINGS*

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5 V

Storage Temperature Range . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature, Soldering (60 sec) . . . . . . . . . . . . +300

°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute maximum rating

conditions for extended rating conditions for extended periods may affect device

reliability.

Thermal Characteristics:

28-lead SSOP package:

θ

ORDERING GUIDE

Temperature

Package

Model

Range

Description

AD6402ARS

–25

°C to +85°C

28-Lead SSOP

AD6402ARS-REEL

–25

°C to +85°C

28-Lead SSOP

PIN CONFIGURATION

14

13

12

11

17

16

15

20

19

18

10

9

8

1

2

3

4

7

6

5

TOP VIEW

(Not to Scale)

28

27

26

25

24

23

22

21

AD6402

TXOUTB

IFIN

IFVCC1

REFSEL

TXOUT

MODOUT

FMMOD2

FMMOD1

IFVCC2

RSSI

IFGND

VCOGND

VCO

VREG

VBAT

CTL3

CTL2

SLREF

PLLVCC

PLLGND

CTL1

CFILT

COFF

REXT

DOUT

REFIN

PLLOUT

DFILP

PIN FUNCTION DESCRIPTIONS

Pin

Mnemonic

Function

1

TXOUTB

Transmit IF VCO Buffer Inverting Output

2

MODOUT

Frequency Modulator Filter Op Amp Output

3

FMMOD2

Frequency Modulator Filter Op Amp Noninverting input

4

FMMOD1

Frequency Modulator Filter Op Amp Inverting input

5

VCOGND

IF VCO Ground

6

VCO

IF VCO Tank Connection

7

VREG

Regulated Supply Output for RF VCO (Supplies Internal IF VCO, Mode Control, Bandgap Reference,

and COFF Buffer)

8

VBAT

Battery Supply Voltage Input to Internal Regulator and COFF Charge Pump

9

CTL3

Mode Control Input 3, CMOS Logical Level

10

CTL2

Mode Control Input 2, CMOS Logical Level

11

CTL1

Mode Control Input 1, CMOS Logical Level

12

CFILT

PLL Demodulator Loop Filter Capacitor

13

COFF

PLL Demodulator Frequency Offset Voltage Track/Hold Capacitor

14

REXT

External Current-Setting Resistor

15

REFIN

Baseband Reference Frequency Input, 100 mV p-p, AC Coupled

16

PLLOUT

PLL Demodulator Output

17

DFILP

Data Filter Voltage-Follower Input

18

DOUT

Data Filter Voltage-Follower Output

19

SLREF

PLL Demodulator Output DC Reference Voltage

20

PLLVCC

PLL Demodulator and Data Filter Supply Input

21

PLLGND

PLL Demodulator and Data Filter Ground

22

IFVCC2

IF Limiter Supply Input 1

23

RSSI

RSSI Output

24

IFGND

IF Stage, Mixer, Band Pass Filter, IF VCO Buffer, Tx Op Amp, Mode Control, and Regulator Ground

25

IFIN

26

IFVCC1

IF Mixer, Limiter 1, IF Filter, IF VCO Buffer

27

REFSEL

Reference Frequency Select; IF = 1.5

× or 2.5× Reference Frequency, CMOS Logical Level Input

28

TXOUT

Transmit IF VCO Buffer Output