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AD632SH 数据表(PDF) 4 Page - Analog Devices

部件名 AD632SH
功能描述  Internally Trimmed Precision IC Multiplier
PDF  6 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD632SH 数据表(HTML) 4 Page - Analog Devices

  AD632SH Datasheet HTML 1Page - Analog Devices AD632SH Datasheet HTML 2Page - Analog Devices AD632SH Datasheet HTML 3Page - Analog Devices AD632SH Datasheet HTML 4Page - Analog Devices AD632SH Datasheet HTML 5Page - Analog Devices AD632SH Datasheet HTML 6Page - Analog Devices  
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AD632
–4–
REV. A
Typical Performance Curves
(typical @ +25 C with
VS = 15 V)
Figure 1. AC Feedthrough vs. Frequency
Figure 2. Frequency Response as a Multiplier
Figure 3. Frequency Response vs. Divider Denominator
Input Voltage
Figure 4. AD632 Functional Block Diagram
OPERATION AS A MULTIPLIER
Figure 5 shows the basic connection for multiplication. Note
that the circuit will meet all specifications without trimming.
Figure 5. Basic Multiplier Connection
In some cases the user may wish to reduce ac feedthrough to a
minimum (as in a suppressed carrier modulator) by applying an
external trim voltage (
±30 mV range required) to the X or Y
input. Curve 1 shows the typical ac feedthrough with this ad-
justment mode. Note that the feedthrough of the Y input is a
factor of 10 lower than that of the X input and should be used
in applications where null suppression is critical.
The Z2 terminal of the AD632 may be used to sum an addi-
tional signal into the output. In this mode the output amplifier
behaves as a voltage follower with a 1 MHz small signal band-
width and a 20 V/
µs slew rate. This terminal should always be
referenced to the ground point of the driven system, particularly
if this is remote. Likewise the differential inputs should be refer-
enced to their respective signal common potentials to realize the
full accuracy of the AD632.
A much lower scaling voltage can be achieved without any re-
duction of input signal range using a feedback attenuator as
shown in Figure 6. In this example, the scale is such that
VOUT = XY, so that the circuit can exhibit a maximum gain of
10. This connection results in a reduction of bandwidth to
about 80 kHz without the peaking capacitor CF. In addition, the
output offset voltage is increased by a factor of 10 making exter-
nal adjustments necessary in some applications.



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