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AD6623BC/PCB 数据表(PDF) 4 Page - Analog Devices |
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AD6623BC/PCB 数据表(HTML) 4 Page - Analog Devices |
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4 / 40 page ![]() REV. 0 –4– AD6623 RECOMMENDED OPERATING CONDITIONS Test AD6623 Parameter Level Min Typ Max Unit VDD IV 2.25 2.5 2.75 V VDDIO IV 3.0 3.3 3.6 V TAMBIENT IV –40 +25 +70 °C ELECTRICAL CHARACTERISTICS Parameter (Conditions) Temp Test Level Min Typ Max Unit LOGIC INPUTS (5 V TOLERANT) Logic Compatibility Full 3.3 V CMOS Logic “1” Voltage Full IV 2.0 5.0 V Logic “0” Voltage Full IV –0.3 +0.8 V Logic “1” Current Full IV 1 10 µA Logic “0” Current Full IV 0 10 µA Input Capacitance 25 °CV 4 pF LOGIC OUTPUTS Logic Compatibility Full 3.3 V CMOS/TTL Logic “1” Voltage (IOH = 0.25 mA) Full IV 2.0 VDD – 0.2 V Logic “0” Voltage (IOL = 0.25 mA) Full IV 0.2 0.4 V IDD SUPPLY CURRENT CLK = 104 MHz, VDD = 2.75 V * Full IV 422 TBD * mA CLK = 104 MHz, VDDIO = 3.6 V * Full IV 193 mA GSM Example: CORE V 232 mA I/O 56 mA IS-136 Example: CORE V 207 mA I/O 55 mA WBCDMA Example V Tbd mA Sleep Mode Full IV Tbd TBD mA POWER DISSIPATION GSM Example V 740 mW IS-136 Example V 700 mW WBCDMA Example V Tbd mW Sleep Mode Full IV Tbd TBD mW *This specification denotes an absolute maximum supply current for the device. The conditions include all channels active, minimum interpolation in both CIC stages, and maximum switching of input data. In an actual application the power will be less. See the Thermal Management section of the data sheet for further details. |
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