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AD6630R/PCB 数据表(PDF) 7 Page - Analog Devices

部件名 AD6630R/PCB
功能描述  Differential, Low Noise IF Gain Block with Output Clamping
PDF  8 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6630R/PCB 数据表(HTML) 7 Page - Analog Devices

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AD6630
–7–
REV. 0
Table I. Typical S Parameters
Frequency
(MHz)
S11
S12
S21
S22
70
224.5
∠ –4.52°
–41.0
∠ –3.0°
24.1
∠ –8.8°
394.3
∠ –8.6°
170
264.8
∠ –32.9°
–31.4
∠ 0°
23.5
∠ –22.5°
382.4
∠ –21.9°
200
227.9
∠ –34.8°
–41.0
∠ –5°
23.2
∠ –26.4°
353.0
∠ –25.4°
250
209.5
∠ –36.2°
–40.6
∠ –2.3°
22.9
∠ –38.9°
328.9
∠ –29.2°
AGND
J3
11
2
C21
10nF
+
–
AGND
1
AGND
C15
1nF
C10
100nF
R1
200
AGND
2
C13
1 F
C16
10nF
+
–
1
AGND
C17
10nF
J1
PCTB3
C2
10nF
TP1
TEST P
1
2
3
AGND
TP2
TEST P
J6
SMA
J7
SMA
1
2
4
6
AGND
1
2
3
C1
10nF
L1
470nH
AGND
C12
10nF
C11
10nF
AGND
1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
AD6630
U1
J2
NC1
NC2
IP2
IP1
IP1B
IP2B
CL1
CL2
VCC1
CD1
OP
VEE
C20
1nF
C19
100nF
AGND
AGND
C14
1nF
C4
100nF
C6
C7
C5
10nF
10nF
10nF
C8
C9
L2
T2
TC 8-1
AT224
AGND
2
1
T1
TC4–1W
AT224
J8
SMA
C3
10nF
R3
R2
200
C18
1 F
9
CMD
OPB
CD2
VCC2
1
2
1
4
6
1
2
3
Figure 14. Evaluation Board Schematic



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