AD720/AD721

REV. 0

–3–

PIN DESCRIPTIONS

Pin Mnemonic*

Description*

1

(NC) GOUT

(No Connection) Green Bypass Buffer

2

(NC) APOS

(No Connection) Analog Positive Supply; +5 V

± 5%

3

(NC) ROUT

(No Connection) Red Bypass Buffer

4

AGND

Analog Ground Connection

5

ENCD

A Logical High Enables the NTSC/PAL Encode

Mode (A Logical Low Powers Down the Chip)

A Logical Low Enables the RGB Bypass Mode

6

RDIN

Red Component Video Input

0 mV to 714 mV for NTSC

0 mV to 700 mV for PAL

7

AGND

Analog Ground Connection

8

GRIN

Green Component Video Input

0 mV to 714 mV for NTSC

0 mV to 700 mV for PAL

9

AGND

Analog Ground Connection

10

BLIN

Blue Component Video Input

0 mV to 714 mV for NTSC

0 mV to 700 mV for PAL

11

STND

A Logical High Input Selects NTSC Encoding

A Logical Low Input Selects PAL Encoding

CMOS Logic Levels

12

AGND

Analog Ground Connection

13

CRMA

Chrominance Output; Subcarrier Only**

572 mV Peak-to-Peak for NTSC

600 mV Peak-to-Peak for PAL

14

APOS

Analog Positive Supply; +5 V

± 5%

15

CMPS

Composite Video Output**

–572 mV to 2 V for NTSC

–600 mV to 2 V for PAL

16

APOS

Analog Positive Supply; +5 V

± 5%

17

LUMA

Luminance Plus SYNC Output**

–572 mV to 1.43 V for NTSC

–600 mV to 1.4 V for PAL

18

VNEG

System Negative Supply; –5 V

± 5%

19

DGND

Digital Ground Connection

20

4FSC

Clock Input at Four Times the Subcarrier Frequency

14.318 180 MHz for NTSC

17.734 480 MHz for PAL

CMOS Logic Levels

21

DPOS

Digital Positive Supply; +5 V

± 5%

22

ASNC

A Logical High Input Resets the Subcarrier Phase

Every Frame

A Logical Low Input Resets the Subcarrier Phase

Every Fourth Frame

CMOS Logic Levels

23

DPOS

Digital Positive Supply; +5 V

± 5%

24

SYNC

Input for Composite Television

Synchronization Pulses

Negative Sync Pulses

CMOS Logic Levels

25

DGND

Digital Ground Connections (One of Two)

26

VNEG

System Negative Supply; –5 V

± 5%

27

(NC) BOUT

(No Connection) Blue Bypass Buffer

28

APOS

Analog Positive Supply; +5 V

± 5%

*( ) pertain only to AD720.

**The luminance, chrominance, and composite outputs are at twice normal

levels for driving 75

Ω reverse-terminated lines.

ORDERING GUIDE

Temperature

Package

Model

Range

Package

Option

AD720JP

0

°C to +70°C

28-Pin PLCC

P-28A

AD721JP

0

°C to +70°C

28-Pin PLCC

P-28A

PIN CONNECTIONS

28-Lead Plastic Leaded Chip Carrier (PLCC) Package

P-28A

AD720/AD721

RGB TO NTSC/PAL

ENCODER

5

6

7

8

9

10

11

28

27

26

1

2

3

4

25

24

23

22

21

20

19

12

13

14

15

16

17

18

DGND

SYNC

DPOS

ASNC

DPOS

4FSC

DGND

ENCD

RDIN

AGND

GRIN

AGND

BLIN

STND

NOTE:

CONNECTIONS IN ( ) PERTAIN ONLY TO AD720

ABSOLUTE MAXIMUM RATINGS*

Supply Voltage

±V

S

. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±6V

Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 600 mW

Operating Temperature Range . . . . . . . . . . . . . . 0

°C to +70°C

Storage Temperature Range . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature, Soldering 60 sec . . . . . . . . . . . . . . +300

°C

NOTE

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only, and functional

operation of the device at these or any other conditions above those indicated in the

operational section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended rating conditions for extended periods

may affect device reliability.

Thermal characteristics: 28-pin plastic package:

θ

WARNING!

ESD SENSITIVE DEVICE

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD720/AD721 features proprietary ESD protection circuitry, permanent damage

may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.